MC9S08DN60F1CLF datasheet(158/356 Pages) FREESCALE

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Chapter 8 Multi-Purpose Clock Generator (S08MCGV1)

MC9S08DN60 Series Data Sheet, Rev 3

158

Freescale Semiconductor

8.5.3

Calibrating the Internal Reference Clock (IRC)

The IRC is calibrated by writing to the MCGTRM register ﬁrst, then using the FTRIM bit to “ﬁne tune”

the frequency. We will refer to this total 9-bit value as the trim value, ranging from 0x000 to 0x1FF, where

the FTRIM bit is the LSB.

The trim value after a POR is always 0x100 (MCGTRM = 0x80 and FTRIM = 0). Writing a larger value

will decrease the frequency and smaller values will increase the frequency. The trim value is linear with

the period, except that slight variations in wafer fab processing produce slight non-linearities between trim

value and period. These non-linearities are why an iterative trimming approach to search for the best trim

value is recommended. In Example #5: Internal Reference Clock Trim this approach will be demonstrated.

After a trim value has been found for a device, this value can be stored in FLASH memory to save the

value. If power is removed from the device, the IRC can easily be re-trimmed by copying the saved value

from FLASH to the MCG registers. Freescale identiﬁes recommended FLASH locations for storing the

trim value for each MCU. Consult the memory map in the data sheet for these locations. On devices that

are factory trimmed, the factory trim value will be stored in these locations.

8.5.3.1

Example #5: Internal Reference Clock Trim

For applications that require a tight frequency tolerance, a trimming procedure is provided that will allow

a very accurate internal clock source. This section outlines one example of trimming the internal oscillator.

Many other possible trimming procedures are valid and can be used.

In the example below, the MCG trim will be calibrated for the 9-bit MCGTRM and FTRIM collective

value. This value will be referred to as TRMVAL.

MC9S08DN60F1CLF Datasheet(PDF) 158 Page - Freescale Semiconductor, Inc