68HC05CL48 datasheet(112/145 Pages) MOTOROLA

112 / 145 page

GENERAL RELEASE SPECIFICATION

June 11, 1997

MOTOROLA

INSTRUCTION SET

MC68HC05CL48

14-2

REV 2.0

14.1.4 Extended

Extended instructions use only three bytes to access any address in memory. The

ﬁrst byte is the opcode; the second and third bytes are the high and low bytes of

the operand address.

When using the Motorola assembler, the programmer does not need to specify

whether an instruction is direct or extended. The assembler automatically selects

the shortest form of the instruction.

14.1.5 Indexed, No Offset

Indexed instructions with no offset are one-byte instructions that can access data

with variable addresses within the ﬁrst 256 memory locations. The index register

contains the low byte of the conditional address of the operand. The CPU auto-

matically uses $00 as the high byte, so these instructions can address locations

$0000–$00FF.

Indexed, no offset instructions are often used to move a pointer through a table or

to hold the address of a frequently used RAM or I/O location.

14.1.6 Indexed, 8-Bit Offset

Indexed, 8-bit offset instructions are two-byte instructions that can access data

with variable addresses within the ﬁrst 511 memory locations. The CPU adds the

unsigned byte in the index register to the unsigned byte following the opcode. The

sum is the conditional address of the operand. These instructions can access

locations $0000–$01FE.

Indexed 8-bit offset instructions are useful for selecting the kth element in an

n-element table. The table can begin anywhere within the ﬁrst 256 memory loca-

tions and could extend as far as location 510 ($01FE). The k value is typically in

the index register, and the address of the beginning of the table is in the byte fol-

lowing the opcode.

14.1.7 Indexed, 16-Bit Offset

Indexed, 16-bit offset instructions are three-byte instructions that can access data

with variable addresses at any location in memory. The CPU adds the unsigned

byte in the index register to the two unsigned bytes following the opcode. The sum

is the conditional address of the operand. The ﬁrst byte after the opcode is the

high byte of the 16-bit offset; the second byte is the low byte of the offset. These

instructions can address any location in memory.

Indexed, 16-bit offset instructions are useful for selecting the kth element in an

n-element table anywhere in memory.

As with direct and extended addressing, the Motorola assembler determines the

shortest form of indexed addressing.

68HC05CL48 Datasheet(PDF) 112 Page - Motorola, Inc

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