ST10F276Z5Q3 datasheet(22/239 Pages) STMICROELECTRONICS

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Pin data

ST10F276Z5

22/239

EA / VSTBY

External access enable pin.

A low level applied to this pin during and after Reset forces the ST10F276Z5 to

start the program from the external memory space. A high level forces the

ST10F276Z5 to start in the internal memory space. This pin is also used (when

Standby mode is entered, that is the device under reset and main VDD turned

off) to bias the 32 kHz oscillator amplifier circuit and to provide a reference

voltage for the low-power embedded voltage regulator which generates the

internal 1.8 V supply for the RTC module (when not disabled) and to retain data

inside the Standby portion of the XRAM (16Kbyte).

It can range from 4.5 to 5.5 V (6 V for a reduced amount of time during the

device life, 4.0 V when RTC and 32 kHz on-chip oscillator amplifier are turned

off). In running mode, this pin can be tied low during reset without affecting 32

kHz oscillator, RTC and XRAM activities, since the presence of a stable VDD

guarantees the proper biasing of all those modules.

P0L.0 -P0L.7,

P0H.0

P0H.1 - P0H.7

100-107,

108,

111-117

I/O

Two 8-bit bidirectional I/O ports P0L and P0H, bit-wise programmable for input or

output via direction bit. Programming an I/O pin as input forces the

corresponding output driver to high impedance state. The input threshold of

Port 0 is selectable (TTL or CMOS).

In case of an external bus configuration, PORT0 serves as the address (A) and

as the address / data (AD) bus in multiplexed bus modes and as the data (D) bus

in demultiplexed bus modes.

Demultiplexed bus modes

Multiplexed bus modes

P1L.0 - P1L.7

P1H.0 - P1H.7

118-125

128-135

I/O

Two 8-bit bidirectional I/O ports P1L and P1H, bit-wise programmable for input or

output via direction bit. Programming an I/O pin as input forces the

corresponding output driver to high impedance state. PORT1 is used as the 16-

bit address bus (A) in demultiplexed bus modes: if at least BUSCONx is

configured such the demultiplexed mode is selected, the pis of PORT1 are not

available for general purpose I/O function. The input threshold of Port 1 is

selectable (TTL or CMOS).

The pins of P1L also serve as the additional (up to 8) analog input channels for

the A/D converter, where P1L.x equals ANy (Analog input channel y,

where y = x + 16). This additional function have higher priority on demultiplexed

bus function. The following PORT1 pins have alternate functions:

132

P1H.4

CC24IO

CAPCOM2: CC24 capture input

133

P1H.5

CC25IO

CAPCOM2: CC25 capture input

134

P1H.6

CC26IO

CAPCOM2: CC26 capture input

135

P1H.7

CC27IO

CAPCOM2: CC27 capture input

Table 2.

Pin description (continued)

Symbol

Type

Function

Data path width

8-bit

16-bi

P0L.0 – P0L.7:

D0 – D7

D0 - D7

P0H.0 – P0H.7:

I/O

D8 - D15

Data path width

8-bit

16-bi

P0L.0 – P0L.7:

AD0 – AD7

AD0 - AD7

P0H.0 – P0H.7:

8 – A15

D8 - AD15

ST10F276Z5Q3 Datasheet(PDF) 22 Page - STMicroelectronics

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