PIC16F1526 datasheet(169/354 Pages) MICROCHIP

169 / 354 page

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Preliminary

DS41458A-page 169

PIC16(L)F1526/27

18.1

Timer1/3/5 Operation

The Timer1/3/5 module is a 16-bit incrementing counter

which is accessed through the TMRxH:TMRxL register

pair. Writes to TMRxH or TMRxL directly update the

counter.

When used with an internal clock source, the module is

a timer and increments on every instruction cycle.

When used with an external clock source, the module

can be used as either a timer or counter and incre-

ments on every selected edge of the external source.

Timer1/3/5 is enabled by configuring the TMRxON and

TMRxGE bits in the TxCON and TxGCON registers,

respectively. Table 18-1 displays the Timer1/3/5 enable

selections.

18.2

Clock Source Selection

The TMRxCS<1:0> and SOSCEN bits of the TxCON

Timer1/3/5. Table 18-2 displays the clock source

selections.

18.2.1

INTERNAL CLOCK SOURCE

When the internal clock source is selected the

TMRxH:TMRxL register pair will increment on multiples

of FOSC as determined by the Timer1/3/5 prescaler.

When the FOSC internal clock source is selected, the

Timer1/3/5 register value will increment by four counts

every instruction clock cycle. Due to this condition, a

2 LSB error in resolution will occur when reading the

Timer1/3/5 value. To utilize the full resolution of

Timer1/3/5, an asynchronous input signal must be used

to gate the Timer1/3/5 clock input.

The following asynchronous sources may be used:

• Asynchronous event on the TxG pin to Timer1/3/5

gate

18.2.2

EXTERNAL CLOCK SOURCE

When the external clock source is selected, the

Timer1/3/5 module may work as a timer or a counter.

When enabled to count, Timer1/3/5 is incremented on

the rising edge of the external clock input TxCKI or the

capacitive sensing oscillator signal. Either of these

external clock sources can be synchronized to the

microcontroller system clock or they can run

asynchronously.

When used as a timer with a clock oscillator, an

external 32.768 kHz crystal can be used in conjunction

with the dedicated internal oscillator circuit.

TABLE 18-1:

TIMER1/3/5 ENABLE

SELECTIONS

TMRxON

TMRxGE

Timer1/3/5

Operation

Off

Always On

Count Enabled

Note:

In Counter mode, a falling edge must be

registered by the counter prior to the first

incrementing rising edge after any one or

more of the following conditions:

•Timer1/3/5 enabled after POR

•Write to TMRxH or TMRxL

•Timer1/3/5 is disabled

•Timer1/3/5 is disabled (TMRxON = 0)

when TxCKI is high then Timer1/3/5

is enabled (TMRxON = 1) when

TxCKI is low.

TABLE 18-2:

CLOCK SOURCE SELECTIONS

TMRxCS1

TMRxCS0

SOSCEN

Clock Source

Instruction Clock (FOSC/4)

System Clock (FOSC)

External Clocking on T1CKI Pin

Capacitive Sensing Oscillator

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