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R5F110ME Datasheet(PDF) 18 Page - Renesas Technology Corp

Part # R5F110ME
Description  RENESAS MCU
PDF  153 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F110ME Datasheet(HTML) 18 Page - Renesas Technology Corp

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RL78/L1C
1. OUTLINE
R01DS0192EJ0200 Rev. 2.00
Page 18 of 149
Feb 21, 2014
Note 1.
In the case of the 16 KB, this is about 15 KB when the self-programming function and data flash function are used.
Note 2.
The number of outputs varies, depending on the setting of channels in use and the number of the master.
[80/85-pin, 100-pin products (without USB)]
(1/2)
Item
80/85-pin
100-pin
R5F111Mx/R5F111Nx (x = E to H, J)
R5F111Px (x = E to H, J)
Code flash memory (KB)
64 to 256
64 to 256
Data flash memory (KB)
8
8
RAM (KB)
8 to 16 Note 1
8 to 16 Note 1
Memory space
1 MB
Main system clock
High-speed system clock
X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
1 to 20 MHz: VDD = 2.7 to 3.6 V, 1 to 8 MHz: VDD = 1.8 to 2.7 V, 1 to 4 MHz: VDD = 1.6 to 1.8 V
High-speed on-chip
oscillator clock
HS (high-speed main) operation mode: 1 to 24 MHz (VDD = 2.7 to 3.6 V),
HS (high-speed main) operation mode: 1 to 16 MHz (VDD = 2.4 to 3.6 V,
LS (low-speed main) operation mode: 1 to 8 MHz (VDD = 1.8 to 3.6 V),
LV (low-voltage main) operation mode: 1 to 4 MHz (VDD = 1.6 to 3.6 V)
Subsystem clock
XT1 (crystal) oscillation, external subsystem clock input (EXCLKS)
32.768 kHz (TYP.): VDD = 1.6 to 3.6 V
Low-speed on-chip oscillator clock
15 kHz (TYP.): VDD = 1.6 to 3.6 V
General-purpose register
8 bits
 32 registers (8 bits  8 registers  4 banks)
Minimum instruction execution time
0.04167
s (High-speed on-chip oscillator clock: fHOCO = fIH = 24 MHz operation)
0.05
s (High-speed system clock: fMX = 20 MHz operation)
30.5
s (Subsystem clock: fSUB = 32.768 kHz operation)
Instruction set
• Data transfer (8/16 bits)
• Adder and subtractor/logical operation (8/16 bits)
• Multiplication (8 bits
 8 bits, 16 bits  16 bits), Division (16 bits  16 bits, 32 bits  32 bits)
• Multiplication and Accumulation (16 bits
 16 bits + 32 bits)
• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.
I/O port
Total
63
81
CMOS I/O
55
73
CMOS input
55
CMOS output
11
N-ch open-drain I/O
(6 V tolerance)
22
Timer
16-bit timer TAU
8 channels (with 1 channel remote control output function) (Timer outputs: 8, PWM outputs: 7 Note 2)
16-bit timer KB2
3 channels (PWM outputs: 6)
Watchdog timer
1 channel
12-bit interval timer
1 channel
Real-time clock 2
1 channel
RTC output
1
1 Hz (subsystem clock: fSUB = 32.768 kHz)



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