GMS81C2012K datasheet(83/107 Pages) HYNIX

83 / 107 page

HYUNDAI MicroElectronics

GMS81C2012/GMS81C2020

MAR. 2000 Ver 1.00

Figure 17-5 Internal RCWDT Mode Releasing by External Interrupt or WDT Interrupt

Figure 17-6 Internal RCWDT Mode Releasing by RESET

17.5 Minimizing Current Consumption

The Stop mode is designed to reduce power consumption.

To minimize current drawn during Stop mode, the user

should turn-off output drivers that are sourcing or sinking

current, if it is practical.

Note: In the STOP operation, the power dissipation asso-

ciated with the oscillator and the internal hardware is low-

ered; however, the power dissipation associated with the

pin interface (depending on the external circuitry and pro-

gram) is not directly determined by the hardware operation

of the STOP feature. This point should be little current flows

when the input level is stable at the power voltage level

(VDD/VSS); however, when the input level becomes higher

RCWDT Mode

Normal Operation

Oscillator

(XI pin)

N+1

N+2

N-1

N-2

Clear Basic Interval Timer

STOP Instruction Execution

Normal Operation

Stabilization Time

tST > 20mS

Internal

Clock

External

Interrupt

BIT

Counter

Internal

RC Clock

( or WDT Interrupt )

Oscillator

(XI pin)

Internal

Clock

Internal

RC Clock

Time can not be control by software

STOP Instruction Execution

Stabilization Time

tST = 64mS @4MHz

Internal

RESET by WDT

RESET

RCWDT Mode

GMS81C2012K Datasheet(PDF) 83 Page - Hynix Semiconductor

GMS81C2012K Datasheet(HTML) 83 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL