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UPSD3312D Datasheet(PDF) 95 Page - STMicroelectronics

Part # UPSD3312D
Description  fast 8032 MCU with programmable logic
PDF  272 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3312D Datasheet(HTML) 95 Page - STMicroelectronics

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UPSD33xx
Standard 8032 timer/counters
Doc ID 9685 Rev 7
95/272
period (12 / fOSC, seconds). However, if MCU_CLK is divided by the SFR CCON0, then the
sample period must be calculated based on the resultant, longer, MCU_CLK frequency. In
this case, an external clock signal on pins C0, C1, or T2 should have a duration longer than
one MCU machine cycle, tMACH_CYC. Section 19.5: Watchdog timer (WDT) on page 90
explains how to estimate tMACH_CYC.
Table 54.
TCON: Timer Control register (SFR 88h, reset value 00h)
Table 55.
TCON register bit definition
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Bit
Symbol
R/W
Definition
7TF1
R
Timer 1 overflow interrupt flag.
Set by hardware upon overflow. Automatically cleared by
hardware after firmware services the interrupt for Timer 1.
6
TR1
R,W
Timer 1 run control.
1 = Timer/Counter 1 is on,
0 = Timer/Counter 1 is off.
5TF0
R
Timer 0 overflow interrupt flag.
Set by hardware upon overflow. Automatically cleared by
hardware after firmware services the interrupt for Timer 0.
4
TR0
R,W
Timer 0 run control.
1 = Timer/Counter 0 is on,
0 = Timer/Counter 0 is off.
3IE1
R
Interrupt flag for external interrupt pin, EXTINT1. Set by
hardware when edge is detected on pin. Automatically cleared
by hardware after firmware services EXTINT1 interrupt.
2IT1
R,W
Trigger type for external interrupt pin EXTINT1.
1 = falling edge,
0 = low-level
1IE0
R
Interrupt flag for external interrupt pin, EXTINT0.
Set by hardware when edge is detected on pin. Automatically
cleared by hardware after firmware services EXTINT0
interrupt.
0IT0
R,W
Trigger type for external interrupt pin EXTINT0.
1 = falling edge,
0 = low-level



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