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UPSD3312D Datasheet(PDF) 49 Page - STMicroelectronics |
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UPSD3312D Datasheet(HTML) 49 Page - STMicroelectronics |
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49 / 272 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) UPSD33xx 8032 addressing modes Doc ID 9685 Rev 7 49/272 9.10 Long addressing This mode will use the 16-bits contained in the two bytes following the instruction byte as a jump destination address for LCALL and LJMP instructions. For example: 9.11 Bit addressing This mode allows setting or clearing an individual bit without disturbing the other bits within an 8-bit value of internal SRAM. Bit Addressing is only available for certain locations in 8032 DATA and SFR memory. Valid locations are DATA addresses 20h - 2Fh and for SFR addresses whose base address ends with 0h or 8h. (Example: The SFR, IE, has a base address of A8h, so each of the eight bits in IE can be addressed individually at address A8h, A9h, ...up to AFh.) For example: LJMP 0500h ; Unconditionally jump to address ; 0500h in program memory SETB AFh ; Set the individual EA bit (Enable All ; Interrupts) inside the SFR register, ; IE. |
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