ST25R3910 datasheet(11/65 Pages) STMICROELECTRONICS

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ST25R3910

Functional overview

Figure 3. Minimum configuration with differential antenna driving (including EMC filter)

1.2.1

Operating modes

The ST25R3910 operating mode is defined by the contents of the Operation Control

At power-up all bits of the Operation Control Register are set to 0, the ST25R3910 is in

Power-down mode. In this mode AFE static power consumption is minimized, only the POR

and part of the bias are active, while the regulators are transparent and are not operating.

The SPI is still functional in this mode so all settings of ISO mode definition and

configuration registers can be done.

Control bit en (bit 7 of the Operation Control Register) is controlling the quartz crystal

oscillator and regulators. When this bit is set, the device enters in Ready mode. In this mode

the quartz crystal oscillator and regulators are enabled. An interrupt is sent to inform the

microcontroller when the oscillator frequency is stable.

Enable of receiver and transmitter are separated so it is possible to operate one without

switching on the other (control bits rx_en and tx_en). In some cases this may be useful, if

the reader field has to be maintained and there is no tag response expected, the receiver

can be switched-off to save current. Another example is the NFCIP-1 active communication

receive mode in which the RF field is generated by the initiator and only the receiver

operates.

The receiver also has a Low power mode in which its power consumption (and then its

sensitivity) is reduced. This mode is entered in by setting control bit rx_lp.

The last control bit of the Operation Control Register is nfc_t bit. Setting of this bit is only

allowed in case the NFC mode is set in the ISO mode definition register. Setting this bit to

one, while all other bits are set to 0, puts the ST25R3910 into Initial NFC Target mode. In

ST25R3910 Datasheet(PDF) 11 Page - STMicroelectronics