ST25R3910 datasheet(23/65 Pages) STMICROELECTRONICS

23 / 65 page

DocID029768 Rev 2

23/65

ST25R3910

Functional overview

FIFO water level and FIFO status registers

The ST25R3910 contains a 32 byte FIFO. In case of transmitting the Control logic shifts the

data that was previously loaded by the external microcontroller to the Framing Block and

further to the transmitter. During reception, the demodulated data is stored in the FIFO and

the external microcontroller can download received data at a later moment.

Transmit and receive capabilities of the ST25R3910 are not limited by the FIFO size due to

a FIFO water level interrupt system. During transmission an interrupt is sent (INTR due to

FIFO water level in the Interrupt Register) when the content of data in the FIFO still to be

sent is lower than the FIFO water level for receive. The external microcontroller can now

add more data in the FIFO. The same stands for the reception: when the number of

received bytes exceeds the FIFO water level for receive an interrupt is sent to inform the

external controller that data has to be downloaded from FIFO.

The external controller has to serve the FIFO faster than data is transmitted or received.

Using SCLK frequency that is at least double than the actual receive or transmit bit rate is

recommended.

There are two settings of the FIFO water level available for receive and transmit in the

Configuration Register 5.

After data are received the external microcontroller needs to know how long the received

data string was before downloading data from the FIFO: This information is available in the

FIFO Status Register, which displays number of bytes in the FIFO that were not read out.

The FIFO Status Register also contains a FIFO overflow bit, set when during reception the

external processor did not react on time and more than 32 bytes were written in FIFO (the

received data are lost in this case).

1.2.10

Direct commands

Table 4. Direct commands

Code

Command

Comments

000001

Set default

Puts the ST25R3910 in default state (same as after

power-up)

000010

Clear

Stops all activities and clears FIFO

000100

Transmit with CRC

Starts a transmit sequence using automatic CRC

generation

000101

Transmit without CRC

Starts a transmit sequence without automatic CRC

generation

000110

Transmit REQA

Transmits REQA command (ISO-14443A mode only

000111

Transmit WUPA

Transmits WUPA command (ISO-14443A mode only)

001000

NFC transmit

with Initial RF Collision Avoidance

Equivalent to Transmit with CRC with additional RF

Collision Avoidance

001001

NFC transmit

with Response RF Collision Avoidance

001010

NFC transmit

with Response RF Collision Avoidance with n=0

010000

Mask receive data

Receive after this command is ignored

ST25R3910 Datasheet(PDF) 23 Page - STMicroelectronics

ST25R3910 Datasheet(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

Datasheet Download

Link URL