ST25R3910 datasheet(28/65 Pages) STMICROELECTRONICS

28 / 65 page

Functional overview

ST25R3910

28/65

DocID029768 Rev 2

1.2.11

Operating sequence

At power-up, the ST25R3910 enters the Power-down mode. The content of all registers is

set to the default state.

The microcontroller, after a power-up, should load the ISO Mode Definition Register

and the configuration registers to configure reader operation.

Configure the regulators. It is recommended to use direct command Adjust Regulators

to improve the system PSRR.

When implementing the LC tank tuning, send the direct command Calibrate Antenna.

When using the AM modulation (ISO-14443B for example), set the modulation depth in

the AM Modulation Depth Control Register and send the command Calibrate

Modulation Depth.

The ST25R3910 is now ready to operate.

1.2.12

ISO-14443 reader operation

To begin with, the Ready mode has to be entered by setting the en bit of the Operation

Control Register or by asserting pin EN. In this mode the oscillator is started and the

regulators are enabled. When the oscillator operation is stable an interrupt is sent.

Before sending any command to a tag, the transmitter and receiver have to be enabled by

setting the bits rx_en and tx_en.

If REQA or WUPA have to be sent, this is simply done by sending the appropriate direct

command, otherwise the following sequence has to be followed:

Send the direct command Clear

Define the number of transmitted bytes in the Number of Transmitted Bytes Register 0

and Number of Transmitted Bytes Register 1

Write the bytes to be transmitted in the FIFO

Send the direct command Transmit With CRC or Transmit Without CRC (whichever is

appropriate)

When all the data is transmitted an interrupt is sent to inform the microcontroller that

the transmission is finished (INTR due to end of transmission)

After the transmission is executed, the ST25R3910 receiver automatically starts to observe

the RFI inputs to detect a tag response. The RSSI and AGC (when enabled) start. The

framing block processes the sub-carrier signal from receiver and fills the FIFO with data.

When the reception is finished and all the data is in the FIFO an interrupt is sent to the

microcontroller (INTR due to end of receive), additionally the FIFO Status Register displays

the number of bytes in the FIFO so that the microcontroller can proceed with data download.

In case of an error or bit collision detected during reception, an interrupt with appropriate

flag is sent.

Transmit and Receive when the data packet is longer than FIFO

In case a data packet is longer than FIFO the sequence explained above is modified.

Before transmit the FIFO is filled. During transmit an interrupt is sent when remaining

number of bytes is lower than the water level (IRQ due to FIFO water level). The

microcontroller in turn adds more data in the FIFO. When all the data is transmitted an

interrupt is sent to inform the microcontroller that transmission is finished.

ST25R3910 Datasheet(PDF) 28 Page - STMicroelectronics

ST25R3910 Datasheet(HTML) 28 Page - STMicroelectronics

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