ST25R3911B datasheet(21/129 Pages) STMICROELECTRONICS

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ST25R3911B

Functional overview

procedure ensures that the input to the digitizing window comparator is less than 3.5 times

larger than its threshold.

AGC operation is controlled by the control bits agc_en, agc_m and agc_fast in the Receiver

Configuration Register 2. Bit agc_en enables the AGC operation, bit agc_m defines the

AGC mode, and bit agc_alg defines the AGC algorithm.

Two AGC modes are available. The AGC can operate during the complete Rx process (as

long as signal rx_on is high), or it can be enabled only during the first eight sub-carrier

pulses.

Two AGC algorithms are available. The AGC can either start by presetting code 4h (max

digitizer window, max gain) or by resetting the code to 0h (min digitizer window, max gain).

The algorithm with preset code is faster, therefore it is recommended for protocols with short

SOF (like ISO14443A fc/128).

Default AGC settings are:

•

AGC is enabled

•

AGC operates during complete Rx process

•

algorithm with preset is used.

RSSI

The receiver also performs the RSSI (Received Signal Strength Indicator) measurement for

both channels. The RSSI measurement is started after the rising edge of rx_on. It stays

active as long as signal rx_on is high, it is frozen while rx_on is low. The RSSI is a peak hold

system, and the value can only increase from the initial zero value. Every time the AGC

reduces the gain the RSSI measurement is reset and starts from zero. Result of RSSI

measurements is a 4-bit value that can be observed by reading the RSSI Display Register.

The LSB step is 2.8 dB, and the maximum code is Dh (13d).

Since the RSSI measurement is of peak hold type the RSSI measurement result does not

follow any variations in the signal strength (the highest value will be kept). In order to follow

RSSI variations it is possible to reset the RSSI bits and restart the measurement by sending

the direct command Clear RSSI.

Receiver in NFCIP-1 active communication mode

There are several features built into the receiver to enable reliable reception of active

NFCIP-1 communication. All these settings are automatically preset by sending the direct

command Analog Preset after the NFCIP-1 mode has been configured. In addition to the

filtering options, there are two NFCIP-1 active communication mode specific configuration

bits stored in the Receiver Configuration Register 3.

Bit lim enables clipping circuits that are positioned after the first and second gain stages.

The function of the clipping circuits is to limit the signal level for the following filtering stage

(when the NFCIP-1 peer is close the input signal level can be quite high).

Bit rg_nfc forces gain reduction of second and third filtering stage to -6 dB while keeping the

digitizer comparator window at maximum level.

1.2.4

Capacitive sensor

The Capacitive sensor block (Figure 5) gives the possibility of low power detection of tag

presence.

ST25R3911B Datasheet(PDF) 21 Page - STMicroelectronics

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