Z86D7308HSC datasheet(24/92 Pages) ZILOG

24 / 92 page

Z86D73

40/44/48-Pin Low-Voltage IR OTP

PS019402-1103

Pin Functions

DS (Output, Active Low)

The Data Strobe is activated one time for each external memory transfer. For a

READ operation, data must be available prior to the trailing edge of DS. For

WRITE operations, the falling edge of DS indicates that output data is valid.

AS (Output, Active Low)

Address Strobe is pulsed one time at the beginning of each machine cycle.

Address output is through Port 0/Port 1 for all external programs. Memory address

transfers are valid at the trailing edge of AS. Under program control, AS is placed

in the high-impedance state along with Ports 0 and 1, Data Strobe, and Read/

Write.

12 Twdt

Watch-Dog Timer

2.0 V

0, 0

Delay Time

3.6 V

2.0 V

0, 1

3.6 V

2.0 V

1, 0

3.6 V

2.0 V

200

1, 1

3.6 V

Notes:

1. Timing Reference uses 0.9 VCC for a logic 1 and 0.1 VCC for a logic 0.

2. Interrupt request through Port 3 (P33–P31).

3. Interrupt request through Port 3 (P30).

4. SMR – D5 = 0.

5. For internal RC oscillator.

Table 8. Additional Timing (Continued)

TA = 0 °C to +70 °C

8.0 MHz

Stop-Mode

Recovery

(D1, D0)

No Sym

Parameter

VCC

Min

Max

Units Notes

Z86D7308HSC Datasheet(PDF) 24 Page - Zilog, Inc.

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