Z86D7308HSC datasheet(37/92 Pages) ZILOG

37 / 92 page

Z86D73

40/44/48-Pin Low-Voltage IR OTP

PS019402-1103

RP, #0Dh

; Select ERF D for access to bank D

; (working register group 0)

RP, #7Dh

; Select expanded register bank D and working

; register group 7 of bank 0 for access.

71h, 2

; CTRL2

→register 71h

R1, 2

; CTRL2

→register 71h

The register file (bank 0) consists of 4 I/O port registers, 237 general-purpose reg-

isters, 16 control and status registers (R0–R3, R4–R239, and R240–R255,

respectively), and two expanded registers groups in Banks D (see Table 10) and

F. Instructions can access registers directly or indirectly through an 8-bit address

field, thereby allowing a short, 4-bit register address to use the Register Pointer

(Figure 18). In the 4-bit mode, the register file is divided into 16 working register

groups, each occupying 16 continuous locations. The Register Pointer addresses

the starting location of the active working register group.

Working register group E0–EF can only be accessed through

working registers and indirect addressing modes.

Figure 18. Register Pointer—Detail

Note:

r7 r6 r5 r4 r3 r2 r1 r0

The upper nibble of the register file address

provided by the register pointer specifies the

active working-register group.

Specified Working

I/O Ports

{

R253

The lower nibble of the

by the instruction points to

the specified register.

* RP = 00: Selects Register Group 0, Working Register 0

R15 to R0

R15 to R4 *

R3 to R0 *

Z86D7308HSC Datasheet(PDF) 37 Page - Zilog, Inc.

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