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P87LPC779FDH Datasheet(PDF) 32 Page - NXP Semiconductors

Part # P87LPC779FDH
Description  CMOS single-chip 8-bit 80C51 microcontroller with 128-byte data RAM, 8 kB OTP
PDF  74 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P87LPC779FDH Datasheet(HTML) 32 Page - NXP Semiconductors

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Philips Semiconductors
P87LPC779
CMOS single-chip 8-bit microcontroller
Product data
Rev. 02 — 03 May 2004
32 of 74
9397 750 13213
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The value of port pins at reset is determined by the PRHI bit in the UCFG1 register.
Ports may be configured to reset high or low as needed for the application. When port
pins are driven high at reset, they are in quasi-bidirectional mode and therefore do
not source large amounts of current.
Every output on the P87LPC779 may potentially be used as a 20 mA sink LED drive
output. However, there is a maximum total output current for all ports which must not
be exceeded.
All ports pins of the P87LPC779 have slew rate controlled outputs. This is to limit
noise generated by quickly switching output signals. The slew rate is factory set to
approximately 10 ns rise and fall times.
The bits in the P2M1 register that are not used to control configuration of P2.1 and
P2.0 are used for other purposes. These bits can enable Schmitt trigger inputs on
each I/O port, enable toggle outputs from Timer 0 and Timer 1, and enable a clock
output if either the internal RC oscillator or external clock input is being used. The last
two functions are described in Section 8.14 “Timer/counters” on page 41 and Section
8.10 “Oscillator” on page 34 respectively. The enable bits for all of these functions are
shown in Tables 21 and 22.
Each I/O port of the P87LPC779 may be selected to use TTL level inputs or Schmitt
inputs with hysteresis. A single configuration bit determines this selection for the
entire port. Port pins P1.2, P1.3, and P1.5 always have a Schmitt trigger input.
Table 21:
P2M1 - Port 2 mode register 1 (address A4h) bit allocation
Not bit addressable; Reset value: 00H
Bit
7
6
5
4
3
2
1
0
Symbol
P2S
P1S
P0S
ENCLK
ENT1
ENT0
(P2M1.1)
(P2M1.0)
Table 22:
P2M1 - Port 2 mode register 1 (address A4h) bit description
Bit
Symbol
Description
7
P2S
When P2S = 1, this bit enables Schmitt trigger inputs on Port 2.
6
P1S
When P1S = 1, this bit enables Schmitt trigger inputs on Port 1.
5
P0S
When P0S = 1, this bit enables Schmitt trigger inputs on Port 0.
4
ENCLK
When ENCLK is set and the P87LPC779 is configured to use the
on-chip RC oscillator, a clock output is enabled on the X2 pin
(P2.0). Refer to Section 8.10 “Oscillator” on page 34 for details.
3
ENT1
When set, the P.7 pin is toggled whenever Timer1 overflows. The
output frequency is therefore one half of the Timer1 overflow rate.
Refer to Section 8.14 “Timer/counters” on page 41 for details.
2
ENT0
When set, the P1.2 pin is toggled whenever Timer0 overflows. The
output frequency is therefore one half of the Timer0 overflow rate.
Refer to Section 8.14 “Timer/counters” on page 41 for details.
1, 0
-
These bits, along with the matching bits in the P2M2 register,
control the output configuration of P2.1 and P2.0 respectively, as
shown in Table 20.



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