NRF9160-SICA-R7 datasheet(371/400 Pages) NORDIC

371 / 400 page

Debug and trace

For details on how to use the debug capabilities, please read the debug documentation of your IDE.

If the device is in System OFF when power is requested via CxxxPWRUPREQ, the system will wake up and

the DIF flag in RESETREAS on page 68 will be set.

9.1.4 Real-time debug

The device supports real-time debugging, which allows interrupts to execute to completion in real time

when breakpoints are set in thread mode or lower priority interrupts.

Real-time debugging thus enables the developer to set a breakpoint and single-step through their code

without a failure of the real-time event-driven threads running at higher priority. For example, this enables

the device to continue to service the high-priority interrupts of an external controller or sensor without

failure or loss of state synchronization while the developer steps through code in a low-priority thread.

9.1.5 Trace

The device supports ETM and ITM trace.

Trace data from the ETM and the ITM is sent to an external debugger via a 4-bit wide parallel trace port

(TPIU), see TRACEDATA[0] through TRACEDATA[3], and TRACECLK in Debug and trace overview on page

369.

For details on how to use the trace capabilities, please read the debug documentation of your IDE.

TPIU's trace pins are multiplexed with GPIOs, see Pin assignments on page 385 for more information.

Note: To configure the trace data delivery to the device trace port, use the MDK system start-up

file included as of MDK version 8.26.0.

Trace speed is configured in the TRACEPORTSPEED (Retained) on page 383 register. The speed of the

trace pins depends on the DRIVE setting of the GPIOs that the trace pins are multiplexed with. See GPIO —

General purpose input/output on page 97 for information about how to set drive settings. Only S0S1 and

H0H1 drives are suitable for debugging. S0S1 is the default DRIVE at reset. If parallel or serial trace port

signals are not fast enough in the debugging conditions, all GPIOs in use for tracing should be set to high

drive (H0H1). The user shall make sure that DRIVE setting for these GPIOs is not overwritten by software

during the debugging session.

9.1.6 Registers

Offset

Security Description

TARGETID

0x042

The TARGETID register provides information about the target when the host is connected to a

single device.

The TARGETID register is accessed by a read of DP register 0x4 when the DPBANKSEL bit in

the SELECT register is set to 0x2.

Table 106: Register overview

9.1.6.1 TARGETID

Address offset: 0x042

The TARGETID register provides information about the target when the host is connected to a single

device.

The TARGETID register is accessed by a read of DP register 0x4 when the DPBANKSEL bit in the SELECT

4418_1315 v2.0

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NRF9160-SICA-R7 Datasheet(PDF) 371 Page - Nordic Semiconductor

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