NRF9160-SICA-R7 datasheet(374/400 Pages) NORDIC

374 / 400 page

Debug and trace

DAP-SIDE

CPU-SIDE

CTRL-AP MAILBOX REGISTERS

DAP

CPU

TXDATA

RXDATA

TXSTATUS

RXSTATUS

TXSTATUS

Figure 115: Mailbox register interface

Mailbox transfer sequence

1. Sender writes TXDATA.

2. Hardware sets sender's TXSTATUS to DataPending.

3. Hardware sets receiver's RXSTATUS to DataPending.

4. Receiver reads RXDATA.

5. Hardware sets receiver's RXSTATUS to NoDataPending.

6. Hardware sets sender's TXSTATUS to NoDataPending.

9.2.4 Disabling erase protection

The erase protection mechanism can be disabled to return a device to factory default settings on next

reset.

The debugger can read the erase protection status in the register ERASEPROTECT.STATUS on page 376.

If ERASEPROTECT has been enabled, both the debugger and on-chip firmware must write the same

non-zero 32-bit KEY value into their respective ERASEPROTECT.DISABLE registers to disable the erase

protection. When both registers have been written with the same non-zero 32-bit KEY value, the device is

automatically erased as described in Erase all on page 373. The access ports will be re-enabled on the

next reset once the secure erase sequence has completed.

The write-once register ERASEPROTECT.LOCK on page 379 should be set to Locked as early as possible

in the start-up sequence, preferably as soon as the on-chip firmware has determined it does not need to

communicate with a debugger over the CTRL-AP mailbox interface. Once written, it will not be possible to

remove the erase protection until the next reset.

9.2.5 Debugger registers

CTRL-AP has a set of registers that can only be accessed from the debugger over the SWD interface. These

are not accessible from the CPU.

9.2.5.1 Registers

Offset

Description

RESET

0x000

System reset request

ERASEALL

0x004

Perform a secure erase of the device, where flash, SRAM and UICR will be erased in sequence. The

device will be returned to factory default settings upon next reset.

ERASEALLSTATUS

0x008

This is the status register for the ERASEALL operation.

APPROTECT.STATUS

0x00C

This is the status register for the UICR access port protection.

4418_1315 v2.0

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NRF9160-SICA-R7 Datasheet(PDF) 374 Page - Nordic Semiconductor

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