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ST25R3916B Datasheet(PDF) 59 Page - STMicroelectronics |
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ST25R3916B Datasheet(HTML) 59 Page - STMicroelectronics |
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59 / 165 page ![]() DS13541 Rev 7 59/165 ST25R3916B ST25R3917B Application information 164 Loading data into FIFO or PT_Memory (FIFO/PT_Memory load) Loading data into FIFO or PT_Memory is similar to writing data into addressable registers. After the I2C slave address the mode byte to trigger a load of the FIFO or selected PT_Memory area is sent (see Table 12) followed by the data bytes to be loaded. Figure 25 shows how to load data into the FIFO. Figure 25. FIFO load Reading data from the FIFO Reading data from the FIFO is similar to reading data from addressable registers. After the I2C slave address the mode byte to trigger a read of the FIFO is sent. After receiving the FIFO read mode byte the ST25R3916B and ST25R3917B send data bytes from the FIFO for as long as the MCU keeps reading the bus. Figure 26. FIFO read Direct command mode After the I2C slave address the mode byte to trigger a direct command is sent. As for SPI some direct commands take some time to execute and no I2C access to the ST25R3916B and ST25R3917B must be performed until the execution of the direct command is completed. All such direct commands send an interrupt upon completion to notify the MCU that the I2C bus can be used again. MS51656V1 SCL SDA A 6 A 5 A 4 A 3 A 2 A 1 A 0 0 0 00 000 A C K 1 P S Data Slave address D 7 D 6 D 5 D 4 D 3 D 2 0 A C K D 1 D 0 D 3 D 2 D 1 D 0 A C K D 5 D 4 D 7 D 6 Data FIFO load A C K MS51657V1 SCL SDA A 6 A 5 A 4 A 3 A 2 A 1 A 0 0 0 01 111 A C K 1 S Slave address 1 A C K FIFO read P Slave address A 2 A 1 A 0 1 A C K A 4 A 3 A 6 A 5 S Data D 3 D 2 D 1 D 0 N A K D 5 D 4 D 7 D 6 |
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