ST25R3916B datasheet(60/165 Pages) STMICROELECTRONICS

60 / 165 page

Application information

ST25R3916B ST25R3917B

60/165

DS13541 Rev 7

Figure 27. Sending a direct command

I2C access to register space-B

To access the register space-B, byte FBh has to be inserted between the I2C slave address

and the register read or write mode byte. Access to register space-B remains active until an

I2C Stop Condition is received.

I2C: transition to and termination of the Transparent mode

When the transparent mode command is received via I2C, the chip interface lines are

switched to the Analogue front end as described in Section 4.4.13: Transparent mode.

Once in transparent mode the BSS signal is used to distinguish between I2C

communication and transparent mode data as follows:

the BSS line must be set high before entering the transparent mode, and then kept high

during the Transparent mode

the Transparent mode is terminated when the BSS line is set to low, followed by at

least one SCL clock pulse

after the termination of the transparent mode the I2C interface can be used again.

I2C: master reads slave immediately after the first byte

If the I2C master omits the mode byte and reads the ST25R3916B and ST25R3917B

immediately after the slave address, then, as shown in Figure 29, it will first output the byte

FFh, followed by a register dump starting at addres 01h.

MS51658V1

SCL

SDA

Slave address

Direct command byte

Figure 28. Read and Write mode for register space-B access

Write to register space B

Slave

address W

AFBh

address

A Data 0 A Data 1 A

...

Data N

Read from register space B

Slave

address W

AFBh

address

ASr

Slave

address R

A Data 0

Data 1 A

...

Data N N P

Legend: S: Start, Sr: repeated Start, A: ACK, N: NAK, P: Stop.

ST25R3916B Datasheet(PDF) 60 Page - STMicroelectronics

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