ST25R3916B datasheet(40/165 Pages) STMICROELECTRONICS

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Application information

ST25R3916B ST25R3917B

40/165

DS13541 Rev 7

For low cost applications it is possible to disable the VDD_D regulator and to supply digital

blocks through external short between VDD_A and VDD_D (configuration bit vspd_off in the

IO configuration register 2).

Power-down support block

In the Power-down mode the regulators are disabled to save current. In this mode a low

power Power-down support block that keeps VDD_D and VDD_A below 3.6 V is enabled.

Typical regulated voltage in this mode is 3.1 V at 5 V supply and 2.2 V at 3 V supply. When

3.3 V supply mode is set this block is disabled, its output is connected to VDD through a

1kΩ resistor.

Typical consumption of Power-down support block is 600 nA at 5 V supply.

Measurement of supply voltages

Using direct command Measure power supply it is possible to measure VDD and regulated

voltages VDD_A, VDD_D and VDD_RF.

4.2.11

Overshoot / undershoot protection

The overshoot / undershoot protection mechanism makes it possible to control the

transmitting waveform during challenging test conditions. This is accomplished by setting bit

patterns in the corresponding registers that produce additional signals during the transition

phase from modulated to unmodulated state or vice versa.

Note:

ST25R3916 legacy overshoot / undershoot protection mode is only valid when rgs_am = 0,

for this reason, specific drive levels must be set. For the ST25R3916B and ST25R3917B

devices, the overshoot / undershoot bits can be simply activated and used in conjunction

with AWS registers.

The operation of this protection is explained by using the overshoot registers. The overshoot

mechanism is only effective when bits are written in ov_pattern<13:0>. Setting

ov_pattern<13:0> to 0 implicitly disables the overshoot protection, as the configuration from

Mode definition register and TX driver register is applied for all clock cycles after the

transition.

The overshoot mode has to be set in control bits ov_tx_mode<1:0> and defines the drive

level for the complete bit pattern. Three modes are available.

•

ov_tx_mode<1:0> = 00b: the transmitter outputs are driven with VDD_DR when the

respective ov_pattern bit is 1.

•

ov_tx_mode<1:0> = 01b: the transmitter outputs are driven with VDD_AM when the

respective ov_pattern bit is 1.

•

ov_tx_mode<1:0> = 10b: the transmitter outputs are stopped (like Type A pause) when

the respective ov_pattern bit is 1.

The overshoot protection pattern ov_pattern<13:0> is applied LSB first. For the first 14 clock

cycles after the transition from modulated to unmodulated state, each of the 14 bits of the

overshoot protection pattern specifies the driver configuration to apply. So ov_pattern<0>

defines which driver configuration to apply for the first clock cycle after the transition from

modulated to unmodulated state, and ov_pattern<9> defines which driver configuration to

apply for the tenth clock cycle after the transition from modulated to unmodulated state.

From the 15th clock cycle on the settings from TX driver register are used.

The undershoot protection works in a similar manner for transitions from unmodulated state

of the carrier to modulated state of the carrier.

ST25R3916B Datasheet(PDF) 40 Page - STMicroelectronics

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