SN250 datasheet(69/130 Pages) STMICROELECTRONICS

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SN250

Functional description—application modules

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7.3.1

SPI modes

The SPI mode of the SC2 supports both master and slave modes. It has a fixed word length

of 8 bits. The SC2 SPI controller is enabled with SC2_MODE set to 2.

The SC2 SPI mode has the following features:

●

Master and slave modes

●

Full duplex operation

●

Programmable master mode clock frequency (12MHz max.)

●

Slave mode up to 5MHz bit rate

●

Programmable clock polarity and clock phase

●

Selectable data shift direction (either LSB or MSB first)

●

Optional slave select input

The following signals can be made available on the GPIO pins:

●

MOSI (master out/slave in)

●

MISO (master in/slave out)

●

MSCLK (serial clock)

●

nSSEL (slave select—only in slave mode)

SPI master mode

The SC2 SPI Master controller is enabled with the SC_SPIMST set in the SC2_SPICFG

The SC2 SPI module obtains its reference clock from a programmable clock generator.

Clock rates are set by a clock division ratio from the 24 MHz clock:

EXP is written to the SC2_RATEEXP register and LIN to the SC2_RATELIN register. Since

the range for both values is 0 to 15, the fastest data rate is 12Mbps and the slowest is

22.9bps.

The SC2 SPI Master supports various frame formats depending upon the clock polarity

(SC_SPIPOL), clock phase (SC_SPIPHA), and direction of data (SC_SPIORD) (see

Table 24). The register bits SC_SPIPOL, SC_SPIPHA, and SC_SPIORD are defined within

the SC2_SPICFG register.

Note:

Switching the SPI configuration from SC_SPIPOL=1 to SC_SPIPOL=0 without subsequently

setting SC2_MODE=0 and reinitializing the SPI will cause an extra byte (0xFE) to be

transmitted immediately before the first intended byte.

Rate

24 MHz

2LIN

() 2

EXP

⋅⋅

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