SN250 datasheet(82/130 Pages) STMICROELECTRONICS

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Functional description—application modules

SN250

82/130

SC2_DMASTAT [0x4416]

SC2_RXCNTA [0x4410]

0-R

SC_RXOVFB

SC_RXOVFA

SC_TXACTB

SC_TXACTA

SC_RXACTB

SC_RXACTA

0-R

SC_RXOVFB

[5]

This bit is set when DMA receive buffer B was passed an overrun error from the lower

hardware FIFO. Neither receive buffers were capable of accepting any more bytes

(unloaded), and the FIFO filled up. Buffer B was the next buffer to load, and when it

drained the FIFO the overrun error was passed up to the DMA and flagged with this

bit. This bit is autocleared the next time buffer B is loaded or when the receive DMA is

reset.

SC_RXOVFA

[4]

This bit is set when DMA receive buffer A was passed an overrun error from the lower

hardware FIFO. Neither receive buffers were capable of accepting any more bytes

(unloaded), and the FIFO filled up. Buffer A was the next buffer to load, and when it

drained the FIFO the overrun error was passed up to the DMA and flagged with this

bit. This bit is autocleared the next time buffer A is loaded or when the receive DMA is

reset.

SC_TXACTB

[3]

This bit is set when DMA transmit buffer B is currently active.

SC_TXACTA

[2]

This bit is set when DMA transmit buffer A is currently active.

SC_RXACTB

[1]

This bit is set when DMA receive buffer B is currently active.

SC_RXACTA

[0]

This bit is set when DMA receive buffer A is currently active.

0-R

SC2_RXCNTA

0-R

SC2_RXCNTA

[12:0]

A byte offset (from 0) which points to the location in DMA receive buffer A where the

next byte will be placed. When the buffer fills and subsequently unloads, this register

wraps around and holds the value zero (pointing back to the first location in the

buffer).

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