SN250 datasheet(74/130 Pages) STMICROELECTRONICS

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Functional description—application modules

SN250

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To generate interrupts to the CPU, the interrupt masks in the INT_SC2CFG and INT_CFG

7.3.2

I2C Master Mode

The SC2 I2C controller is only available in master mode. The SC2 I2C controller is enabled

with SC2_MODE set to 3. The I2C Master controller supports Standard (100 Kbps) and Fast

(400 Kbps) I2C modes. Address arbitration is not implemented, so multiple master

applications are not supported. The I2C signals are pure open-collector signals, and

external pull-up resistors are required.

The SC2 I2C mode has the following features:

●

Programmable clock frequency (400kHz max.)

●

7- and 10-bit addressing

The following signals can be made available on the GPIO pins:

●

SDA (serial data)

●

SCL (serial clock)

The I2C Master controller obtains its reference clock from a programmable clock generator.

Clock rates are set by a clock division ratio from the 24MHz clock:

EXP is written to the SC2_RATEEXP register and LIN to the SC2_RATELIN register.

Table 26 shows the rate settings for Standard I2C (100 Kbps) and Fast I2C (400 Kbps)

operation.

Note that, at 400 Kbps, the I2C specification requires the minimum low period of SCL to be

1.3µs. To be strictly I2C compliant, the rate needs to be lowered to 375 Kbps.

The I2C Master controller supports generation of various frame segments defined by the

SC2_I2CCTRL1

Full I2C frames have to be constructed under software control by generating individual I2C

segments. All necessary segment transitions are shown in Figure 7. ACK or NACK

generation of an I2C receive frame segment is determined with the register bit SC_I2CACK

in the SC2_I2CCTRL2 register.

Generation of a 7-bit address is accomplished with one transmit segment. The upper 7 bits

of the transmitted character contain the 7-bit address. The remaining lower bit contains the

command type (“read” or “write”).

Generation of a 10-bit address is accomplished with two transmit segments. The upper 5

bits of the first transmit character must be set to 0x1E. The next 2 bits are for the 2 most

Table 26.

I2C nominal rate programming

Nominal Rate

SPPR

SPR

100 Kbps

375 Kbps

400 Kbps

Nominal Rate

24MHz

2LIN

() 2

EXP

⋅⋅

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