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MC68HC908GR4MP Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 286 page ![]() General Description MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 26 Freescale Semiconductor These port pins also have selectable pullups when configured for input mode. The pullups are disengaged when configured for output mode. The pullups are selectable on an individual port bit basis. When the port pins are configured for special-function mode (SPI, TIM1, TIM2), pullups can be selectable on an individual port pin basis. 1.5.12 Port E I/O Pins (PTE1/RxD–PTE0/TxD) PTE1–PTE0 are special-function, bidirectional I/O port pins. These pins can also be programmed to be serial communications interface (SCI) pins. See Chapter 18 Serial Communications Interface (SCI) and See Chapter 16 Input/Output Ports (I/O). NOTE Any unused inputs and I/O ports should be tied to an appropriate logic level (either VDD or VSS). Although the I/O ports of the MC68HC908GR8 do not require termination, termination is recommended to reduce the possibility of electro-static discharge damage. |
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