MC68HC908GR4MP datasheet(29/286 Pages) FREESCALE

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MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

Freescale Semiconductor

2.6 Register Summary

$FE0D

Reserved

3 Bytes

↓

$FE0F

$FE10

Unimplemented

16 Bytes

Reserved for Compatibility with Monitor Code

for A-Family Parts

↓

$FE1F

$FE20

Monitor ROM

310 Bytes

↓

$FF55

$FF56

Unimplemented

40 Bytes

↓

$FF7D

$FF7E

FLASH Block Protect Register (FLBPR)

$FF7F

Unimplemented

93 Bytes

↓

$FFDB

Note: $FFF6–$FFFD

contains

8 security bytes

$FFDC

FLASH Vectors

(36 Bytes including $FFFF)

↓

$FFFE

$FFFF

Low byte of reset vector when read

COP Control Register (COPCTL)

Addr.

Bit 7

654321

Bit 0

$0000

Port A Data Register

(PTA)

Read:

0000

PTA3

PTA2

PTA1

PTA0

Write:

Reset:

Unaffected by reset

$0001

Port B Data Register

(PTB)

Read:

PTB5

PTB4

PTB3

PTB2

PTB1

PTB0

Write:

Reset:

Unaffected by reset

$0002

Port C Data Register

(PTC)

Read:

000000

PTC1

PTC0

Write:

Reset:

Unaffected by reset

$0003

Port D Data Register

(PTD)

Read:

PTD6

PTD5

PTD4

PTD3

PTD2

PTD1

PTD0

Write:

Reset:

Unaffected by reset

= Unimplemented

R = Reserved

U = Unaffected

Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 7)

Figure 2-1. Memory Map (Continued)

MC68HC908GR4MP Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

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