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MC68HC908GR4MP Datasheet(PDF) 58 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 58 Page - Freescale Semiconductor, Inc |
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58 / 286 page ![]() Analog-to-Digital Converter (ADC) MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 58 Freescale Semiconductor 5.6 I/O Signals The ADC module has six pins shared with port B, PTB5/AD5–PTB0/ATD0. 5.6.1 ADC Analog Power Pin (VDDAD)/ADC Voltage Reference High Pin (VREFH) The ADC analog portion uses VDDAD as its power pin. Connect the VDDAD pin to the same voltage potential as VDD. External filtering may be necessary to ensure clean VDDAD for good results. NOTE For maximum noise immunity, route VDDAD carefully and place bypass capacitors as close as possible to the package. 5.6.2 ADC Analog Ground Pin (VSSAD)/ADC Voltage Reference Low Pin (VREFL) The ADC analog portion uses VSSAD as its ground pin. Connect the VSSAD pin to the same voltage potential as VSS. 5.6.3 ADC Voltage In (VADIN) VADIN is the input voltage signal from one of the six ADC channels to the ADC module. 5.7 I/O Registers These I/O registers control and monitor ADC operation: • ADC status and control register (ADSCR) • ADC data register (ADR) • ADC clock register (ADCLK) 5.7.1 ADC Status and Control Register Function of the ADC status and control register (ADSCR) is described here. COCO — Conversions Complete Bit When the AIEN bit is a logic 0, the COCO is a read-only bit which is set each time a conversion is completed except in the continuous conversion mode where it is set after the first conversion. This bit is cleared whenever the ADSCR is written or whenever the ADR is read. If the AIEN bit is a logic 1, the COCO is a read/write bit which selects the CPU to service the ADC interrupt request. Reset clears this bit. 1 = Conversion completed (AIEN = 0) 0 = Conversion not completed (AIEN = 0), or CPU interrupt (AIEN = 1) Address: $0003C Bit 7 654321 Bit 0 Read: COCO AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0 Write: Reset: 00011111 Figure 5-2. ADC Status and Control Register (ADSCR) |
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