MC68HC908GR4MP datasheet(140/286 Pages) FREESCALE

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Monitor ROM (MON)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

140

Freescale Semiconductor

The MCU executes the SWI and PSHH instructions when it enters monitor mode. The RUN command

tells the MCU to execute the PULH and RTI instructions. Before sending the RUN command, the host can

modify the stacked CPU registers to prepare to run the host program. The READSP command returns

the incremented stack pointer value, SP + 1. The high and low bytes of the program counter are at

addresses SP + 5 and SP + 6.

Figure 15-7. Stack Pointer at Monitor Mode Entry

15.4 Security

A security feature discourages unauthorized reading of FLASH locations while in monitor mode. The host

can bypass the security feature at monitor mode entry by sending eight security bytes that match the

bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.

NOTE

Do not leave locations $FFF6–$FFFD blank. For security reasons, they

should be programmed even if they are not used for vectors.

During monitor mode entry, the MCU waits after the power-on reset for the host to send the eight security

bytes on pin PTA0. If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the

security feature and can read all FLASH locations and execute code from FLASH. Security remains

bypassed until a power-on reset occurs. If the reset was not a power-on reset, security remains bypassed

and security code entry is not required. (See Figure 15-8.)

Upon power-on reset, if the received bytes of the security code do not match the data at locations

$FFF6–$FFFD, the host fails to bypass the security feature. The MCU remains in monitor mode, but

reading a FLASH location returns an invalid value and trying to execute code from FLASH causes an

illegal address reset. After receiving the eight security bytes from the host, the MCU transmits a break

character, signifying that it is ready to receive a command.

NOTE

The MCU does not transmit a break character until after the host sends the

eight security bytes.

To determine whether the security code entered is correct, check to see if bit 6 of RAM address $40 is

set. If it is, then the correct security code has been entered and FLASH can be accessed.

If the security sequence fails, the device can be reset by a power-on reset and brought up in monitor mode

to attempt another entry. After failing the security sequence, the FLASH mode can also be bulk erased

by executing an erase routine that was downloaded into internal RAM. The bulk erase operation clears

the security code locations so that all eight security bytes become $FF (blank).

CONDITION CODE REGISTER

ACCUMULATOR

LOW BYTE OF INDEX REGISTER

HIGH BYTE OF PROGRAM COUNTER

LOW BYTE OF PROGRAM COUNTER

SP + 1

SP + 2

SP + 3

SP + 4

SP + 5

SP + 6

HIGH BYTE OF INDEX REGISTER

SP + 7

MC68HC908GR4MP Datasheet(PDF) 140 Page - Freescale Semiconductor, Inc

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