| Electronic Components Datasheet Search |
|
STM8L052R8 Datasheet(PDF) 87 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8L052R8 Datasheet(HTML) 87 Page - STMicroelectronics |
|
87 / 109 page ![]() STM8L052R8 Electrical parameters Doc ID023337 Rev 2 87/109 Figure 30. Typical NRST pull-up resistance RPU vs. VDD Figure 31. Typical NRST pull-up current Ipu vs. VDD The reset network shown in Figure 32 protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below the VIL max. level specified in Table 39. Otherwise the reset is not taken into account internally. For power consumption- sensitive applications, the capacity of the external reset capacitor can be reduced to limit the charge/discharge current. If the NRST signal is used to reset the external circuitry, the user must pay attention to the charge/discharge time of the external capacitor to meet the reset timing conditions of the external devices. The minimum recommended capacity is 10 nF. 30 35 40 45 50 55 60 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VDD [V] -40°C 25°C 85°C ai18224V2 ai18225V2 0 20 40 60 80 100 120 1.8 1.95 2.1 2.25 2.4 2.55 2.7 2.85 3 3.15 3.3 3.45 3.6 VDD [V] -40°C 25°C 85°C |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |