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MFS2401AVMAFES Datasheet(PDF) 95 Page - NXP Semiconductors |
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MFS2401AVMAFES Datasheet(HTML) 95 Page - NXP Semiconductors |
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95 / 151 page  NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver Bit Symbol Description POR, or clear on write (write '1') Report V1 temperature warning event 0 No event detected 1 die V1 TWARN occurred 13 V1TWARN_I POR, or clear on write (write '1') Report V1 undervoltage pre-warning event 0 No event detected 1 V1 undervoltage pre-warning event occurred 14 V1UVW_I POR, or clear on write (write '1') Report V1 low side overcurrent event 0 No event detected 1 V1 LS OC occurred 15 V1LSOC_I POR, or clear on write (write '1') Table 75. M_REG_FLG register bit description...continued 22.10 M_REG_MSK Bit 15 14 13 12 11 10 9 8 Write V1LSOC_M V1UVW_M V1TWARN_M V1TSD_M 0 V3TSD_M V1UVLP_M V1UV_M Read V1LSOC_M V1UVW_M V1TWARN_M V1TSD_M 0 V3TSD_M V1UVLP_M V1UV_M Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write 0 V3UV_M V1OV_M 0 V3OV_M V1OC_M 0 V3OC_M Read 0 V3UV_M V1OV_M 0 V3OV_M V1OC_M 0 V3OC_M Reset 0 0 0 0 0 0 0 0 Table 76. M_REG_MSK register bit allocation Bit Symbol Description Inhibit V3 overcurrent interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 0 V3OC_M POR Inhibit V1 overcurrent interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 2 V1OC_M POR Inhibit V3 overvoltage interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 3 V3OV_M POR Inhibit V1 overvoltage interrupt 0 Interrupt is not inhibited 5 V1OV_M 1 Interrupt is inhibited Table 77. M_REG_MSK register bit description FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 95 / 151 |
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