LM4931ITLSLASHNOPB datasheet(40/50 Pages) TI2

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LM4931

SNAS251E – APRIL 2004 – REVISED MAY 2013

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MCLK/XTAL_IN (JP3)

This is the input for an external Master Clock. The jumper at S13 must be removed (disconnecting the onboard

crystal from the circuit) when using an external Master Clock. Additionally, the jumper S14 may be used to

connect the MCLK with the PCM and I2S interface buses.

High-Efficiency Class D BTL Mono Out (JP5)

This is the high-efficiency mono speaker output, designed for use with an 8

Ω speaker. The outputs are driven in

bridge-tied-load (BTL) mode, so both sides have signal. Outputs are normally biased at one half AVDD when the

LM4931 is in active mode. The class D amplifier provides exceptional power use savings versus standard class

AB amplifiers. A measurement output (JP6) is also provided, since the switching characteristics of an unfiltered

Class D output often render conventional audio measurement techniques useless. This output band-limits the

output to 20kHz, filtering out the switching noise for measurement purposes. This measurement output is not

intended to provide power to a load.

Stereo Headphone Out (JP15 or P1)

This is the stereo headphone output. Each channel is single-ended, with 47uF DC blocking capacitors mounted

on the demo board. The jack (P1) features a typical stereo headphone pinout. An alternate, pinned connection is

also provided (JP15).

Headphone sense is incorporated into the jack on the demo board. In this application HP_SENSE is pulled low

by the 1k

Ω resistor when no headphone is present. This gives a corresponding logic low output on the

HP_SENSE pin. When a headphone is placed in the jack the 1k

Ω pull-down is disconnected and a 100kΩ pull-

up resistor creates a high voltage condition on HP_SENSE. This information may be placed on the GPIO pin to

reliably drive an external microcontroller with headphone status.

It is important to note that if using the alternate connection (JP15) for stereo headphone operation, HP sense is

still tied to the mini-jack, requiring a physical plug to break the connection. HP sensing will then require a plug be

placed in the jack (dummy plug).

MIC Jack (JP1)

This jack is for connection to an external microphone like the kind typically found in mobile phones. Pin 1 is

GND, pin 2 is the negative input pin, and pin 3 is the positive pin, with phantom voltage supplied by MIC_BIAS

on the LM4931.

GPIO (JP14)

This pin provides simple status updates from the LM4931 to an external microcontroller if desired. The GPIO

output may be configured in the PMC_CONFIG (0Ah) register. Bits of the PMC_CONFIG (0Ah) register may be

used to set the GPIO to output information regarding whether the headphone is connected, the voice-codec

clock, an external LS enable signal, and shutdown status for the voiceband ADC, voiceband DAC, and the Left

and Right channels of the full range-audio DAC. The voice-codec clock is only provided over the GPIO port if the

voice codec is enabled. These outputs can be useful for simple software/driver development to monitor mode

changes, or as a simple debugging tool.

BASIC OPERATION

The LM4931 is a highly integrated audio subsystem with many different operating modes available. These

modes may be controlled in the BASIC_CONFIG (00h) register by bits 3:0. These mode settings are shown in

the BASIC_CONFIG (00h) register table and are described here below:

Powerdown Mode (0000b)

Part is powered down, analog outputs are not biased. This is a minimum current mode. All part features are shut

down.

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