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LM5064PMH/NOPB Datasheet(PDF) 28 Page - Texas Instruments |
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LM5064PMH/NOPB Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 64 page ![]() VEE_K VCC OUT VEE SENSE SENSE_ K OUTPUT LM5064 RS Q1 GND + COUT Z1 INPUT RAIL D1 GATE GND Rpin Dpin Rpin Rpin Dpin Rpin Dpin VEE_K VCC OUT VEE SENSE SENSE_ K OUTPUT LM5064 RS Q1 GND + COUT Z1 INPUT RAIL D1 GATE GND (VCC-VEE) 0V + - VRS Input Rail Discharge Event VBD + - IREVERSE Reverse Current (IREVERSE) Region LM5064 SNVS718E – JUNE 2011 – REVISED FEBRUARY 2013 www.ti.com As the input dips, the output capacitor discharges causing a transient reverse current flow. Figure 16. Differential Voltage Across Sense Resistor Figure 16 shows how the induced reverse current spike causes a differential voltage across the sense resistor, VRS, and the Q1 body-diode, VBD. The transient reverse current, IREVERSE, is approximately equal to IREVERSE = COUT x dVIN/dt because the output capacitor is discharged through the input. Faster discharge rates (dVIN/dt) will induce larger IREVERSE currents. If IREVERSE is extremely high, it can cause a large negative voltage at the SENSE_K, SENSE, and OUT pins with respect to the VEE pin of the LM5064. If the negative absolute maximum voltage rating is greatly exceeded, harmful currents can flow into the affected pins. Series pin resistors can be implemented to limit the pin current caused by the negative voltage excursion. Schottky diodes may also be implemented to completely clamp the voltage at these pins. Figure 17 illustrates this. Series resistors are used to limit harmful negative pin currents and schottky diodes are used to clamp the voltage at each pin. Figure 17. Schottky Diodes Used to Clamp Pin Voltage 28 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: LM5064 |
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