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LM5064PMH/NOPB Datasheet(PDF) 7 Page - Texas Instruments |
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LM5064PMH/NOPB Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 64 page  LM5064 www.ti.com SNVS718E – JUNE 2011 – REVISED FEBRUARY 2013 Electrical Characteristics (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VCC-VEE = 48V. See (1) (2). Symbol Parameter Conditions Min Typ Max Units VAUXLSB VAUX input LSB 724 µV VAUXHFSR VAUXH input full scale range 88.9 V VAUXHLSB VAUXH input LSB 21.7 mV OUTLSB OUT pin LSB 21.7 mV IINACC Input current accuracy SENSE_K-VEE_K = 50 mV, CL = VEE (Note 6) -3.0 3.0 % VACC VAUX, VAUXH, OUT VAUXH-VEE=48V,OUT - VEE= 48V, VAUX = 2.8V -2.7 2.7 % PINACC Input power accuracy VCC-VEE = 48V, SENSE_K-VEE_K = 50 mV, CL -4.5 4.5 % = VDD Diode Temperature Sensor TACC Temperature accuracy using TA = 25°C to 85°C 2 °C local diode Remote diode resolution 9 bits IDIODE External diode current source High Level 250 325 µA Low Level 9.4 µA Diode current ratio 25.9 VAUX IIN Input current VAUX = 3V 1 µA VDD Regulation VDDOUT VDD regulated output IDD = 0 mA 4.6 4.9 5.15 V IDD = -10 mA 4.8 V VDDILIM VDD current limit VDD = 0V -25 -30 -42 mA VDDPOR VDD voltage reset threshold VDD Rising 4.1 V PMBus Pin Thresholds (SCL, SDAI/O, SMBA) (7) VIL Data, clock input low voltage With respect to VEE 0.9 V VIH Data, clock input high voltage With respect to VEE 2.1 5.5 V VOL Data output low voltage ISINK = 3 mA 0 0.4 µA ILEAK Input leakage current SDAI, SMBA, SCL = 5V above VEE 1 µA Pin Strappable Thresholds (CL, RETRY) VIH Input high voltage 3 V ILEAK Input leakage current CL,RETRY = 5V 5 µA Thermal (8) θJA Junction to ambient 30 °C/W θJC Junction to case 4 °C/W (7) PMBus communication clock rate at final test is 400 kHz. (8) Junction to ambient thermal resistance is highly application and board layout dependent. Specified thermal resistance values for the package specified is based on a 4-layer, 4"x3", 2/1/1/2 oz. Cu board as per JEDEC standards is used. For detailed information on soldering plastic HTSSOP packages refer to the Packaging Data Book. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LM5064 |
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