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LM5064PMH/NOPB Datasheet(PDF) 6 Page - Texas Instruments |
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LM5064PMH/NOPB Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 64 page  LM5064 SNVS718E – JUNE 2011 – REVISED FEBRUARY 2013 www.ti.com Electrical Characteristics (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VCC-VEE = 48V. See (1) (2). Symbol Parameter Conditions Min Typ Max Units IVEE_K VEE_K input current -10 µA Circuit Breaker RTCB Circuit breaker to current limit CB/CL ratio bit = 0, ILim = 50 mV 1.45 1.9 2.22 ratio: (VSENSE-VVEE)/VCL CB/CL ratio bit = 1, ILim = 50 mV 2.8 3.7 4.9 CB/CL ratio bit = 0, ILim = 26 mV 1.8 CB/CL ratio bit = 1, ILim = 26 mV 3.6 VCB Circuit breaker threshold CB/CL ratio bit = 0, ILim = 50 mV 72 93 116 mV voltage: (VSENSE-VVEE) CB/CL ratio bit = 1, ILim = 50 mV 144 187 230 mV CB/CL ratio bit = 0, ILim = 26 mV 37 49 59 mV CB/CL ratio bit = 1, ILim = 26 mV 72 93 116 mV tCB Circuit breaker response time SENSE-VEE stepped from 0 mV to 150 mV, time 800 ns to GATE = VEE Timer (TIMER) VTMRH Upper threshold 3.74 3.9 4.07 V VTMRL Lower threshold Restart cycles 1.09 1.2 1.39 V End of 8th cycle 0.3 V Re-enable threshold 0.3 V ITIMER Insertion time current -5.9 -4.8 -3.3 µA Sink current, end of insertion TIMER pin = VEE+2V 1 1.5 2 mA time Fault detection current SENSE-VEE=VCL -95 -74 -50 µA Fault sink current 1.7 2.4 3.2 µA DCFAULT Fault restart duty cycle 0.5 % tFAULT Fault to GATE = VEE delay TIMER pin reaches the upper threshold 15 µs Power Good (PGD) PGDTH Threshold measured at OUT - OUT – SENSE Decreasing 1.18 1.24 1.31 V SENSE OUT – SENSE Increasing 2.44 2.5 2.56 V PGDVOL Output low voltage ISINK = 2 mA 50 150 mV PGDIOH Off leakage current VPGD = 80V 5 µA ADC and MUX Resolution 12 Bits INL Integral non-linearity ADC only ±4 LSB tACQUIRE Acquisition + conversion time Any Channel 100 µs tRR Acquisition round robin time Cycle all channels 1 ms Internal Reference VREF Reference voltage 2.93 2.97 3.02 V Telemetry Accuracy (5) IINFSR Current input full scale range CL= VEE (6) 74.9 mV CL = VDD (6) 38.1 mV IINLSB Current input LSB CL= VEE (6) 18.3 µV CL = VDD (6) 9.3 µV VAUXFSR VAUX input full scale range 2.96 V (5) Full scale range depends on both the VREF value and the gain/attenuation of the current/voltage channel. (6) CL bit High or Low is set by either the CL pin on startup (if CL = VDD, then High, if CL = VEE or FLOAT, then Low) or by the current limit setting bit in the device setup register. 6 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: LM5064 |
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