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LMK05028RGCT.B Datasheet(PDF) 29 Page - Texas Instruments

Part # LMK05028RGCT.B
Description  LMK05028 Low-Jitter Dual-Channel Network Synchronizer Clock With EEPROM
PDF  94 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LMK05028RGCT.B Datasheet(HTML) 29 Page - Texas Instruments

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performance, provided the TCXO loop bandwidth is designed low enough to attenuate the noise contribution.
This input can be driven from a low-frequency TCXO, OCXO, or external traceable clock that conforms to the
frequency accuracy and holdover stability requirements of the application. TCXO and OCXO frequencies of 10 to
12.8 MHz are widely available and cost-effective options.
The TCXO input can accept an AC-coupled single-ended clock (sine, clipped-sine, or square wave) and has an
internal weak bias of about 0.6 V. The input voltage swing must be less than 1.3 Vpp and terminated before
AC-coupling to the pin. If unused, the TCXO input buffer can be powered down by register bit and the pin can be
left floating.
The buffered TCXO path also drives the input monitoring blocks as well as the TCXO/Ref bypass mux to the
output muxes, allowing a buffered copy of the TCXO input on OUT0 and/or OUT1.
LMK05028
TCXO_IN
11 k
~0.6 V
(weak bias)
Internal
TCXO path
1.2-V
LVCMOS
Figure 7-9. TCXO Input Buffer
www.ti.com
LMK05028
SNAS724B – FEBRUARY 2018 – REVISED FEBRUARY 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: LMK05028



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