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PSD511B1 Datasheet(PDF) 130 Page - STMicroelectronics |
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PSD511B1 Datasheet(HTML) 130 Page - STMicroelectronics |
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130 / 153 page  PSD5XX Family 127 -20 -25 ZPLD_TURBO Symbol Parameter Conditions Min Max Min Max OFF * Unit tIVIV Interrupt Request Input to Interrupt Output (Note 3) 70 120 0 ns tRXIX Read Vector to Interrupt Request Clear 60 100 0 ns tILIL Interrupt Request Minimum Pulse Width 40 45 0 ns tRLQV RD to Data Valid Interrupt Controller (Note 1) 50 90 0 ns -20 -25 ZPLD_TURBO Symbol Parameter Conditions Min Max Min Max OFF * Unit fMAX Maximum Frequency 20.00 12.50 0 MHz tCHCL Clock High Time 16 22 0 ns tCLCH Clock Low Time 16 22 0 ns tCHPV Clock to Output Delay 50 55 0 ns tCHPV1 Clock to Watchdog Output Delay 90 100 Add 20 ns tLVCH Input Setup Time Relative Add 20 to Rising Level Clock Any Input 45 60 (Note 2) ns tMIN Minimum Clock Period 1/fMAX 50 80 0 ns NOTES: 1. Read to Data Valid of the Interrupt Request Latch and Interrupt Priority Status. RD timing has the same timing as PSEN, DS, LDS, UDS signals. 2. For inputs which use PPLD only. 3. This timing is only valid when read to the interrupt request latch and priority status latch are not valid. *If ZPLD_TURBO is off and the ZPLD is operating above 15 MHz, there is no need to add 20 ns to the timing parameters. Counter/Timer Timing (3.0 V ± 10%) Interrupt Timing (3.0 V ± 10%) AC/DC Parameters – ZPLD Timing Parameters (ZPSD5XXV Versions) |
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