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T89C51AC2-RLSI-M Datasheet(PDF) 69 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M Datasheet(HTML) 69 Page - ATMEL Corporation |
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69 / 117 page ![]() Draft.A - March 30, 2001 69 Preview - Confidential T89C51AC2 TL2 (S:CCh) Timer 2 Low Byte Register Reset Value = 0000 0000b Not bit addressable Figure 58. TL2 Register RCAP2H (S:CBh) Timer 2 Reload/Capture High Byte Register Reset Value = 0000 0000b Not bit addressable Figure 59. RCAP2H Register RCAP2L (S:CAh) Timer 2 Reload/Capture Low Byte Register Reset Value = 0000 0000b Not bit addressable Figure 60. RCAP2L Register 7 6 5 4 3 2 1 0 -------- Bit Number Bit Mnemonic Description 7-0 Low Byte of Timer 2. 7 6 5 4 3 2 1 0 -------- Bit Number Bit Mnemonic Description 7-0 High Byte of Timer 2 Reload/Capture. 7 6 5 4 3 2 1 0 -------- Bit Number Bit Mnemonic Description 7-0 Low Byte of Timer 2 Reload/Capture. |
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