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T89C51AC2-RLSI-M Datasheet(PDF) 97 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M Datasheet(HTML) 97 Page - ATMEL Corporation |
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97 / 117 page ![]() Draft.A - March 30, 2001 97 Preview - Confidential T89C51AC2 IEN1 (S:E8h) Interrupt Enable Register Reset Value: xxxx xx0xb bit addressable Figure 88. IEN1 Register 7 6 5 4 3 2 1 0 - - - - - EADC - Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2- Reserved The value read from this bit is indeterminate. Do not set this bit. 1 EADC ADC Interrupt Enable bit Clear to disable the ADC interrupt. Set to enable the ADC interrupt. 0- Reserved The value read from this bit is indeterminate. Do not set this bit. |
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