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T89C51AC2-RLSI-M Datasheet(PDF) 100 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M Datasheet(HTML) 100 Page - ATMEL Corporation |
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100 / 117 page  100 Draft.A - March 30, 2001 Preview - Confidential T89C51AC2 IPH0 (B7h) Interrupt High Priority Register Reset Value: X000 0000b Figure 91. IPL0 Register 7 6 5 4 3 2 1 0 - PPCH PT2H PSH PT1H PX1H PT0H PX0H Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPCH EWC-PCA Counter Interrupt Priority level most significant bit PPCH PPC Priority level 0 0 Lowest 01 10 1 1 Highest priority 5 PT2H Timer 2 overflow interrupt High Priority bit PT2H PT2 Priority Level 0 0 Lowest 01 10 1 1 Highest 4 PSH Serial port High Priority bit PSH PS Priority Level 0 0 Lowest 01 10 1 1 Highest 3 PT1H Timer 1 overflow interrupt High Priority bit PT1H PT1 Priority Level 0 0 Lowest 01 10 1 1 Highest 2 PX1H External interrupt 1 High Priority bit PX1H PX1 Priority Level 0 0 Lowest 01 10 1 1 Highest 1 PT0H Timer 0 overflow interrupt High Priority bit PT0H PT0 Priority Level 0 0 Lowest 01 10 1 1 Highest 0 PX0H External interrupt 0 high priority bit PX0H PX0 Priority Level 0 0 Lowest 01 10 1 1 Highest |
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