T89C51AC2-RLSI-M datasheet(36/117 Pages) ATMEL

36 / 117 page

Draft.A - March 30, 2001

Preview - Confidential

T89C51AC2

AUXR (S:8Eh)

Auxiliary Register

Reset Value= X00X 1100b

Not bit addressable

Figure 24. AUXR Register

XRS1

XRS0

EXTRAM

Bit Number

Bit Mnemonic

Description

7-6

Reserved

The value read from these bits are indeterminate. Do not set this bit.

5M0

Stretch MOVX control:

the RD/ and the WR/ pulse length is increased according to the value of M0.

Pulse length in clock period

130

Reserved

The value read from this bit is indeterminate. Do not set this bit.

3-2

XRS1-0

ERAM size:

Accessible size of the ERAM

XRS1:0

ERAM size

256 bytes

512 bytes

768 bytes

1024 bytes (default)

EXTRAM

Internal/External RAM (00h - FFh)

access using MOVX @ Ri /@ DPTR

0 - Internal ERAM access using MOVX @ Ri / @ DPTR.

1 - External data memory access.

0A0

Disable/Enable ALE)

0 - ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if X2 mode is used)

1 - ALE is active only during a MOVX or MOVC instruction.

T89C51AC2-RLSI-M Datasheet(PDF) 36 Page - ATMEL Corporation

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