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H8/3008 Datasheet(PDF) 40 Page - Renesas Technology Corp |
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H8/3008 Datasheet(HTML) 40 Page - Renesas Technology Corp |
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40 / 686 page ![]() Rev.4.00 Aug. 20, 2007 Page xl of xliv REJ09B0395-0400 Section 6 Bus Controller Table 6.1 Bus Controller Pins ............................................................................................ 103 Table 6.2 Bus Controller Registers .................................................................................... 104 Table 6.3 Bus Specifications for Each Area (Basic Bus Interface) .................................... 119 Table 6.4 Data Buses Used and Valid Strobes ................................................................... 124 Table 6.5 Pin States in Idle Cycle ...................................................................................... 136 Section 7 I/O Ports Table 7.1 Port Functions .................................................................................................... 141 Table 7.2 Port 4 Registers .................................................................................................. 145 Table 7.3 Input Pull-Up MOS Transistor States (Port 4) ................................................... 147 Table 7.4 Port 6 Registers .................................................................................................. 148 Table 7.5 Port 6 Pin Functions in Modes 1 to 4 ................................................................. 150 Table 7.6 Port 7 Data Register ........................................................................................... 151 Table 7.7 Port 8 Registers .................................................................................................. 153 Table 7.8 Port 8 Pin Functions in Modes 1 to 4 ................................................................. 155 Table 7.9 Port 9 Registers .................................................................................................. 157 Table 7.10 Port 9 Pin Functions ........................................................................................... 159 Table 7.11 Port A Registers ................................................................................................. 162 Table 7.12 Port A Pin Functions (Modes 1 and 2) ............................................................... 165 Table 7.13 Port A Pin Functions (Modes 3 and 4) ............................................................... 167 Table 7.14 Port A Pin Functions (Modes 1 to 4).................................................................. 169 Table 7.15 Port B Registers.................................................................................................. 173 Table 7.16 Port B Pin Functions (Modes 1 to 4) .................................................................. 175 Section 8 16-Bit Timer Table 8.1 16-bit timer Functions ........................................................................................ 178 Table 8.2 16-bit timer Pins ................................................................................................. 182 Table 8.3 16-bit timer Registers ......................................................................................... 183 Table 8.4 PWM Output Pins and Registers ........................................................................ 220 Table 8.5 Up/Down Counting Conditions .......................................................................... 224 Table 8.6 16-bit timer Interrupt Sources ............................................................................ 229 Table 8.7 (a) 16-bit timer Operating Modes (Channel 0) ........................................................ 239 Table 8.7 (b) 16-bit timer Operating Modes (Channel 1) ........................................................ 240 Table 8.7 (c) 16-bit timer Operating Modes (Channel 2) ........................................................ 241 Section 9 8-Bit Timers Table 9.1 8-Bit Timer Pins ................................................................................................. 246 Table 9.2 8-Bit Timer Registers ......................................................................................... 247 Table 9.3 Operation of Channels 0 and 1 when Bit ICE is Set to 1 in 8TCSR1 Register .. 257 |
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