H8SLASH3008 datasheet(17/686 Pages) RENESAS

17 / 686 page

Rev.4.00 Aug. 20, 2007, Page xvii of xliv

REJ09B0395-0400

Contents

Section 1 Overview .............................................................................................................

1.1

Overview...........................................................................................................................

1.2

Block Diagram ..................................................................................................................

1.3

Pin Description..................................................................................................................

1.3.1

Pin Arrangement ..................................................................................................

1.3.2

Pin Functions .......................................................................................................

1.3.3

Pin Assignments in Each Mode ........................................................................... 12

Section 2 CPU ...................................................................................................................... 17

2.1

Overview........................................................................................................................... 17

2.1.1

Features ................................................................................................................ 17

2.1.2

Differences from H8/300 CPU............................................................................. 18

2.2

CPU Operating Modes ...................................................................................................... 18

2.3

Address Space ................................................................................................................... 19

2.4

Register Configuration ...................................................................................................... 20

2.4.1

Overview.............................................................................................................. 20

2.4.2

General Registers ................................................................................................. 21

2.4.3

Control Registers ................................................................................................. 22

2.4.4

Initial CPU Register Values ................................................................................. 23

2.5

Data Formats ..................................................................................................................... 24

2.5.1

General Register Data Formats ............................................................................ 24

2.5.2

Memory Data Formats ......................................................................................... 25

2.6

Instruction Set ................................................................................................................... 27

2.6.1

Instruction Set Overview ..................................................................................... 27

2.6.2

Instructions and Addressing Modes ..................................................................... 28

2.6.3

Tables of Instructions Classified by Function...................................................... 29

2.6.4

Basic Instruction Formats .................................................................................... 38

2.6.5

Notes on Use of Bit Manipulation Instructions.................................................... 39

2.7

Addressing Modes and Effective Address Calculation ..................................................... 41

2.7.1

Addressing Modes ............................................................................................... 41

2.7.2

Effective Address Calculation.............................................................................. 43

2.8

Processing States............................................................................................................... 47

2.8.1

Overview.............................................................................................................. 47

2.8.2

Program Execution State...................................................................................... 47

2.8.3

Exception-Handling State .................................................................................... 48

2.8.4

Exception Handling Operation............................................................................. 49

2.8.5

Bus-Released State............................................................................................... 50

2.8.6

Reset State............................................................................................................ 50

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