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H8/3008 Datasheet(PDF) 72 Page - Renesas Technology Corp |
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H8/3008 Datasheet(HTML) 72 Page - Renesas Technology Corp |
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72 / 686 page  2. CPU Rev.4.00 Aug. 20, 2007 Page 28 of 638 REJ09B0395-0400 2.6.2 Instructions and Addressing Modes Table 2.2 indicates the instructions available in the H8/300H CPU. Table 2.2 Instructions and Addressing Modes Addressing Modes Function Instruction #xx Rn @ERn @ (d:16, ERn) @ (d:24, ERn) @ERn+/ @–ERn @ aa:8 @ aa:16 @ aa:24 @ (d:8, PC) @ (d:16, PC) @@ aa:8 ⎯ MOV BWL BWL BWL BWL BWL BWL B BWL BWL ⎯ ⎯ ⎯ ⎯ Data transfer POP, PUSH ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ WL MOVFPE, ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ MOVTPE ADD, CMP BWL BWL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Arithmetic operations SUB WL BWL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ADDX, SUBX B B ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ADDS, SUBS ⎯ L ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ INC, DEC ⎯ BWL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ DAA, DAS ⎯ B ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ MULXU, ⎯ BW ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ MULXS, DIVXU, DIVXS NEG ⎯ BWL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ EXTU, EXTS ⎯ WL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Logic operations AND, OR, XOR ⎯ BWL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ NOT ⎯ BWL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Shift instructions ⎯ BWL ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Bit manipulation ⎯ B B ⎯ ⎯ ⎯ B ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Branch Bcc, BSR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ JMP, JSR ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ RTS ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ TRAPA ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ System control RTE ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ SLEEP ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ LDC B B W W W W ⎯ W W ⎯ ⎯ ⎯ STC ⎯ B W W W W ⎯ W W ⎯ ⎯ ⎯ ⎯ ANDC, ORC, XORC B ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ NOP ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Block data transfer ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ BW |
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