H8SLASH3008 datasheet(20/686 Pages) RENESAS

20 / 686 page

Rev.4.00 Aug. 20, 2007 Page xx of xliv

REJ09B0395-0400

6.3.4

Chip Select Signals .............................................................................................. 119

6.3.5

Address Output Method....................................................................................... 120

6.4

Basic Bus Interface ........................................................................................................... 122

6.4.1

Overview.............................................................................................................. 122

6.4.2

Data Size and Data Alignment............................................................................. 122

6.4.3

Valid Strobes........................................................................................................ 123

6.4.4

Memory Areas ..................................................................................................... 124

6.4.5

Basic Bus Control Signal Timing ........................................................................ 125

6.4.6

Wait Control ........................................................................................................ 132

6.5

Idle Cycle .......................................................................................................................... 134

6.5.1

Operation ............................................................................................................. 134

6.5.2

Pin States in Idle Cycle ........................................................................................ 136

6.6

Bus Arbiter........................................................................................................................ 137

6.6.1

Operation ............................................................................................................. 137

6.7

Register and Pin Input Timing .......................................................................................... 139

6.7.1

6.7.2

BREQ Pin Input Timing ...................................................................................... 140

Section 7 I/O Ports .............................................................................................................. 141

7.1

Overview........................................................................................................................... 141

7.2

Port 4................................................................................................................................. 144

7.2.1

Overview.............................................................................................................. 144

7.2.2

7.3

Port 6................................................................................................................................. 148

7.3.1

Overview.............................................................................................................. 148

7.3.2

7.4

Port 7................................................................................................................................. 151

7.4.1

Overview.............................................................................................................. 151

7.4.2

7.5

Port 8................................................................................................................................. 152

7.5.1

Overview.............................................................................................................. 152

7.5.2

7.6

Port 9................................................................................................................................. 156

7.6.1

Overview.............................................................................................................. 156

7.6.2

7.7

Port A................................................................................................................................ 161

7.7.1

Overview.............................................................................................................. 161

7.7.2

7.8

Port B ................................................................................................................................ 172

7.8.1

Overview.............................................................................................................. 172

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