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H8/3024F Datasheet(PDF) 68 Page - Renesas Technology Corp |
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H8/3024F Datasheet(HTML) 68 Page - Renesas Technology Corp |
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68 / 841 page  Section 2 CPU Rev. 2.00 Sep 20, 2005 page 30 of 800 REJ09B0260-0200 2.6.2 Instructions and Addressing Modes Table 2.2 indicates the instructions available in the H8/300H CPU. Table 2.2 Instructions and Addressing Modes Addressing Modes Function Instruction MOV BWL BWL BWL BWL BWL BWL B BWL BWL —— —— POP, PUSH —— —— —— —— — — — — WL MOVFPE, —— —— —— —— — — — — — Data transfer MOVTPE ADD, CMP BWL BWL —— —— —— — — — — — SUB WL BWL —— —— —— — — — — — ADDX, SUBX B B —— —— —— — — — — — ADDS, SUBS — L —— —— —— — — — — — INC, DEC — BWL —— —— —— — — — — — DAA, DAS — B —— —— —— — — — — — MULXU, — BW —— —— —— — — — — — MULXS, DIVXU, DIVXS NEG — BWL —— —— —— — — — — — Arithmetic operations EXTU, EXTS — WL —— —— —— — — — — — AND, OR, XOR — BWL —— —— —— — — — — — Logic operations NOT — BWL —— —— —— — — — — — Shift instructions — BWL —— —— —— — — — — — Bit manipulation — BB —— — B ——— —— — Bcc, BSR —— —— —— —— — — — — — JMP, JSR —— —— —— —— —— Branch RTS —— —— —— —— —— — TRAPA —— —— —— —— — — — — RTE —— —— —— —— — — — — SLEEP —— —— —— —— — — — — LDC B B W W W W — WW —— — STC — BW W W W — WW —— —— ANDC, ORC, XORC B —— —— —— ——— —— — System control NOP —— —— —— —— — — — — Block data transfer —— —— —— —— — — — — BW Note: B: Byte W: Word L: Longword |
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