PCIMX536AVV8B datasheet(104/180 Pages) FREESCALE

104 / 180 page

i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1

104

Freescale Semiconductor

Electrical Characteristics

4.7.8.9

Standard Serial Interfaces

The IPU supports the following types of asynchronous serial interfaces:

1. 3-wire (with bidirectional data line).

2. 4-wire (with separate data input and output lines).

3. 5-wire type 1 (with sampling RS by the serial clock).

4. 5-wire type 2 (with sampling RS by the chip select signal).

The IPU has four independent outputs and one input. The port can be configured to provide 3, 4, or 5-wire

interfaces.

Figure 56 depicts the timing diagram of the 3-wire serial interface. The timing diagrams correspond to

active-low IPP#_CS signal and the straight polarity of the IPP_CLK signal.

For this interface, a bidirectional data line is used outside the chip. The IPU still uses separate input and

output data lines (IPP_IND_DISPB_SD_D and IPP_DO_DISPB_SD_D). The I/O mux should provide

joining the internal data lines to the bidirectional external line according to the IPP_OBE_DISPB_SD_D

signal provided by the IPU.

9Display control up for read

DISP_UP is predefined in REGISTER.

10Display control down for read

DISP_DOWN is predefined in REGISTER.

11Display control up for write

DISP_UP is predefined in REGISTER.

12This parameter is a requirement to the display connected to the IPU.

13Data read point

Note: DISP#_READ_EN—operand of DC’s MICROCDE READ command to sample incoming data.

14Loop back delay Tlbd is the cumulative propagation delay of read controls and read data. It includes an IPU output delay, a

chip-level output delay, board delays, a chip-level input delay, an IPU input delay. This value is chip specific.

Tdicur

---T

DI_CLK

ceil

DISP_UP_#

DI_CLK_PERIOD

----------------------------------------------

⎝⎠

⎛⎞

Tdicdrw

---T

DI_CLK

ceil

DISP_DOWN_#

DI_CLK_PERIOD

--------------------------------------------------

⎝⎠

⎛⎞

Tdicuw

---T

DI_CLK

ceil

2DISP_UP_#

DI_CLK_PERIOD

----------------------------------------------

⎝⎠

⎛⎞

Tdrp

DI_CLK

ceil

DISP#_READ_EN

DI_CLK_PERIOD

----------------------------------------------

PCIMX536AVV8B Datasheet(PDF) 104 Page - Freescale Semiconductor, Inc

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