F28M36P63C2ZWTQ datasheet(14/202 Pages) TI

14 / 202 page

F28M36P63B2, F28M36P63C2

F28M36P53B2, F28M36P53C2, F28M36P33B2, F28M36P33C2

SPRS825 – OCTOBER 2012

www.ti.com

Table 2-9. Master Subsystem Flash, ECC, OTP, Boot ROM (continued)

M Address

Size

µDMA Access

Master Subsystem Flash, ECC, OTP, Boot ROM

(Byte-Aligned)(1)

(Bytes)

ROM/Flash/OTP/Boot ROM – Mirror-mapped for µCRC.

Accessing this area of memory by the µCRC peripheral will

cause an access in 0000 0000 – 03FF FFFF memory space.

Mirrored boot ROM: 0x0400 0000 – 0x0400 FFFF (Not dual-

mapped ROM address)

0400 0000 – 07FF FFFF

64M

Mirrored Flash bank: 0x0420 0000 – 0x042F FFFF

Mirrored Flash OTP: 0x0468 0000 – 0x0468 1FFF

(Read cycles from this space cause the µCRC peripheral to

continuously update data checksum inside a register, when

reading a block of data.)

0800 0000 – 1FFF FFFF

Reserved

Table 2-10. Master Subsystem RAMs

µDMA

M Address

Size

C Address

Master Subsystem RAMs

C DMA Access(2)

Access

(Byte-Aligned)(1)

(Bytes)

(x16 Aligned)(2)

2000 0000 – 2000 1FFF

C0 RAM (ECC, Secure)

2000 2000 – 2000 3FFF

C1 RAM (ECC, Secure)

yes

2000 4000 – 2000 5FFF

C2 RAM (Parity)

yes

2000 6000 – 2000 7FFF

C3 RAM (Parity)

yes

2000 8000 – 2000 9FFF

S0 RAM (Parity, Shared)

0000 C000 – 0000 CFFF

yes

2000 A000 – 2000 BFFF

S1 RAM (Parity, Shared)

0000 D000 – 0000 DFFF

yes

2000 C000 – 2000 DFFF

S2 RAM (Parity, Shared)

0000 E000 – 0000 EFFF

yes

2000 E000 – 2000 FFFF

S3 RAM (Parity, Shared)

0000 F000 – 0000 FFFF

yes

2001 0000 – 2001 1FFF

S4 RAM (Parity, Shared)

0001 0000 – 0001 0FFF

yes

2001 2000 – 2001 3FFF

S5 RAM (Parity, Shared)

0001 1000 – 0001 1FFF

yes

2001 4000 – 2001 5FFF

S6 RAM (Parity, Shared)

0001 2000 – 0001 2FFF

yes

2001 6000 – 2001 7FFF

S7 RAM (Parity, Shared)

0001 3000 – 0001 3FFF

yes

2001 8000 – 2001 9FFF

C4 RAM (Parity)

yes

2001 A000 – 2001 BFFF

C5 RAM (Parity)

yes

2001 C000 – 2001 DFFF

C6 RAM (Parity)

yes

2001 E000 – 2001 FFFF

C7 RAM (Parity)

yes

2002 0000 – 2002 1FFF

C8 RAM (Parity)

yes

2002 2000 – 2002 3FFF

C9 RAM (Parity)

yes

2002 4000 – 2002 5FFF

C10 RAM (Parity)

yes

2002 6000 – 2002 7FFF

C11 RAM (Parity)

yes

2002 8000 – 2002 9FFF

C12 RAM (Parity)

yes

2002 A000 – 2002 BFFF

C13 RAM (Parity)

yes

2002 C000 – 2002 DFFF

C14 RAM (Parity)

yes

2002 E000 – 2002 FFFF

C15 RAM (Parity)

2003 0000 – 2007 EFFF

Reserved

yes

2007 F000 – 2007 F7FF

CtoM MSG RAM (Parity)

0003 F800 – 0003 FBFF

yes

read only

yes

2007 F800 – 2007 FFFF

MtoC MSG RAM (Parity)

0003 FC00 – 0003 FFFF

read only

2008 0000 – 2008 1FFF

C0 RAM - ECC Bits

2008 2000 – 2008 3FFF

C1 RAM - ECC Bits

2008 4000 – 2008 5FFF

C2 RAM - Parity Bits

2008 6000 – 2008 7FFF

C3 RAM - Parity Bits

2008 8000 – 2008 9FFF

S0 RAM - Parity Bits

0004 C000 – 0004 CFFF

(1)

The letter "M" refers to the Master Subsystem.

(2)

The letter "C" refers to the Control Subsystem.

Device Overview

Submit Documentation Feedback

F28M36P63C2ZWTQ Datasheet(PDF) 14 Page - Texas Instruments

F28M36P63C2ZWTQ Datasheet(HTML) 14 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL