F28M36P63C2ZWTQ datasheet(17/202 Pages) TI

17 / 202 page

F28M36P63B2, F28M36P63C2

F28M36P53B2, F28M36P53C2, F28M36P33B2, F28M36P33C2

www.ti.com

SPRS825 – OCTOBER 2012

Table 2-11. Master Subsystem Peripherals (continued)

µDMA

M Address

Master Subsystem

Size

C Address

C DMA Access(2)

Access

(Byte-Aligned)(1)

Peripherals

(Bytes)

(x16 Aligned)(2)

yes

4005 F000 – 4005 FFFF

M GPIO Port H (AHB Bus)(1)

yes

4006 0000 – 4006 0FFF

M GPIO Port J (AHB Bus)(1)

yes

4006 1000 – 4006 1FFF

M GPIO Port K (AHB Bus)(1)

yes

4006 2000 – 4006 2FFF

M GPIO Port L (AHB Bus)(1)

yes

4006 3000 – 4006 3FFF

M GPIO Port M (AHB Bus)(1)

yes

4006 4000 – 4006 4FFF

M GPIO Port N (AHB Bus)(1)

yes

4006 5000 – 4006 5FFF

M GPIO Port P (AHB Bus)(1)

yes

4006 6000 – 4006 6FFF

M GPIO Port Q (AHB Bus)(1)

yes

4006 7000 – 4006 7FFF

M GPIO Port R (AHB Bus)(1)

yes

4006 8000 – 4006 8FFF

M GPIO Port S (AHB Bus)(1)

4006 9000 – 4006 FFFF

Reserved

4007 0000 – 4007 3FFF

CAN0

16K

4007 4000 – 4007 7FFF

CAN1

16K

4007 8000 – 400C FFFF

Reserved

400D 0000 – 400D 0FFF

EPI0 (Registers only)

400D 1000 – 400F 9FFF

Reserved

400F A000 – 400F A303

M Flash Control Registers(3)

772

400F A304 – 400F A5FF

Reserved

M Flash ECC Error Log

400F A600 – 400F A647

Registers(3)

400F A648 – 400F B1FF

Reserved

400F B200 – 400F B2FF

RAM Configuration Registers

256

0000 4900 – 0000 497F

RAM ECC/Parity/Access Error

400F B300 – 400F B3FF

256

0000 4A00 – 0000 4A7F

Log Registers

400F B400 – 400F B5FF

M CSM Registers(1)

512

400F B600 – 400F B67F

µCRC

128

400F B680 – 400F B6FF

Reserved

400F B700 – 400F B77F

CtoM and MtoC IPC Registers

128

0000 4E00 – 0000 4E3F

400F B780 – 400F B7FF

Reserved

400F B800 – 400F B87F

M Clock Control Registers(1)

128

0000 4400 – 0000 443F

400F B880 – 400F B8BF

M LPM Control Registers(1)

400F B8C0 – 400F B8FF

M Reset Control Registers(1)

0000 0880 – 0000 0890

400F B900 – 400F B93F

Device Configuration Registers

(Read Only)

400F B940 – 400F B97F

Reserved

400F B980 – 400F B9FF

M Write Protect Registers(1)

128

400F BA00 – 400F BA7F

M NMI Registers(1)

128

400F BA80 – 400F BAFF

Reserved

M Hardware Logic BIST

400F BB00 – 400F BBFF

256

Registers

400F BC00 – 400F EFFF

Reserved

400F F000 – 400F FFFF

µDMA Registers

4010 0000 – 41FF FFFF

Reserved

Bit Banded Peripheral Zone

(Dedicated address for each

yes

4200 0000 – 43FF FFFF

32M

peripherals above.)

4400 0000 – 4FFF FFFF

Reserved

(3)

The letter "M" refers to the Master Subsystem.

Device Overview

Submit Documentation Feedback

F28M36P63C2ZWTQ Datasheet(PDF) 17 Page - Texas Instruments

F28M36P63C2ZWTQ Datasheet(HTML) 17 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL