R5F110ME datasheet(119/153 Pages) RENESAS

119 / 153 page

RL78/L1C

3. ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105 °C)

R01DS0192EJ0200 Rev. 2.00

Page 119 of 149

Feb 21, 2014

Note

Use it with VDD

 Vb.

Caution

Select the TTL input buffer for the SIp pin and the N-ch open drain output (VDD tolerance) mode for the SOp pin

and SCKp pin by using port input mode register g (PIMg) and port output mode register g (POMg). For VIH and

VIL, see the DC characteristics with TTL input buffer selected.

(Remarks are listed on the page after the next page.)

(6)

Communication at different potential (1.8 V, 2.5 V) (CSI mode) (master mode, SCKp... internal clock

output)

(TA = -40 to +105 °C, 2.4 V  VDD  3.6 V, VSS = 0 V)

(1/2)

Parameter

Symbol

Conditions

HS (high-speed main) Mode

Unit

MIN.

MAX.

SCKp cycle time

tKCY1

 fCLK/4 2.7 V  VDD  3.6 V, 2.3 V  Vb  2.7 V,

Cb = 30 pF, Rb = 2.7 k



1000 Note

2.4 V

 VDD  3.3 V, 1.6 V  Vb  1.8 V,

Cb = 30 pF, Rb = 5.5 k



2300 Note

SCKp high-level width

tKH1

2.7 V

 VDD  3.6 V, 2.3 V  Vb  2.7 V,

Cb = 30 pF, Rb = 2.7 k



tKCY1/2 - 340

2.4 V

 VDD  3.3 V, 1.6 V  Vb  2.0 V,

Cb = 30 pF, Rb = 5.5 k



tKCY1/2 - 916

SCKp low-level width

tKL1

2.7 V

 VDD  3.6 V, 2.3 V  Vb  2.7 V,

Cb = 30 pF, Rb = 2.7 k



tKCY1/2 - 36

2.4 V

 VDD  3.3 V, 1.6 V  Vb  2.0 V,

Cb = 30 pF, Rb = 5.5 k



tKCY1/2 - 100

R5F110ME Datasheet(PDF) 119 Page - Renesas Technology Corp

R5F110ME Datasheet(HTML) 119 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL