AT89LP51RB2 datasheet(71/254 Pages) ATMEL

71 / 254 page

3722A–MICRO–10/11

AT89LP51RB2/RC2/IC2 Preliminary

A second pull-up, called the “weak” pull-up, is turned on when the port latch for the pin contains

a logic “1” and the pin itself is also at a logic “1” level. This pull-up provides the primary source

current for a quasi-bidirectional pin that is outputting a “1”. If this pin is pulled low by an external

device, this weak pull-up turns off, and only the very weak pull-up remains on. In order to pull the

pin low under these conditions, the external device has to sink enough current to overpower the

weak pull-up and pull the port pin below its input threshold voltage.

The third pull-up is referred to as the “strong” pull-up. This pull-up is used to speed up low-to-

high transitions on a quasi-bidirectional port pin when the port latch changes from a logic “0” to a

logic “1”. When this occurs, the strong pull-up turns on for one CPU clock, quickly pulling the port

pin high. The quasi-bidirectional port configuration is shown in Figure 12-1.

12.1.2

Input-only Mode

The input only port configuration is shown in Figure 12-2. The output drivers are tristated. The

input includes a Schmitt-triggered input for improved input noise rejection. The input circuitry of

P3.2, P3.3, P4.6 and P4.7 is not disabled during Power-down (see Figure 12-3) and therefore

these pins should not be left floating during Power-down when configured in this mode.

Input-only mode can reduce power consumption for low-level inputs over quasi-bidirectional

mode because the “very weak” pull-up is turned off and only very small leakage current in the

sub microamp range is present.

Figure 12-1. Quasi-bidirectional Output

Figure 12-2. Input Only

Figure 12-3. Input Circuit for P3.2, P3.3, P4.6 and P4.7

1 Clock Delay

(D Flip-Flop)

Strong

Very

Weak

Port

VCC

From Port

Input

Data

PWD

Port

Input

Data

PWD

Port

Input

Data

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