UPSD3312D datasheet(106/272 Pages) STMICROELECTRONICS

106 / 272 page

Obsolete

Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

Serial UART interfaces

UPSD33xx

106/272

Doc ID 9685 Rev 7

Serial UART interfaces

UPSD33xx devices provide two standard 8032 UART serial ports.

●

The first port, UART0, is connected to pins RxD0 (P3.0) and TxD0 (P3.1)

●

The second port, UART1 is connected to pins RxD1 (P1.2) and TxD1 (P1.3). UART1

can optionally be routed to pins P4.2 and P4.3 as described in Section 17.1.4:

Alternate functions on page 82.

The operation of the two serial ports are the same and are controlled by two SFRs:

●

SCON0 (Table 63 on page 108) for UART0

●

SCON1 (Table 65 on page 109) for UART1

Each UART has its own data buffer accessed through an SFR listed below:

●

SBUF0 for UART0, address 99h

●

SBUF1 for UART1, address D9h

When writing SBU0 or SBUF1, the data automatically loads into the associated UART

transmit data register. When reading this SFR, data comes from a different physical register,

which is the receive register of the associated UART.

Note:

For simplicity in the remaining UART discussions, the suffix “0” or “1” will be dropped when

referring to SFR registers and bits related to UART0 or UART1, since each UART interface

has identical operation. Example, SBUF0 and SBUF1 will be referred to as just SBUF.

Each UART serial port can be full-duplex, meaning it can transmit and receive

simultaneously. Each UART is also receive-buffered, meaning it can commence reception of

a second byte before a previously received byte has been read from the SBUF register.

However, if the first byte still has not been read by the time reception of the second byte is

complete, one of the bytes will be lost.

21.1

UART operation modes

Each UART can operate in one of four modes, one mode is synchronous, and the others are

asynchronous as shown in Table 62 on page 107.

21.1.1

Mode 0

Mode 0 provides asynchronous, half-duplex operation. Serial data is both transmitted, and

received on the RxD pin. The TxD pin outputs a shift clock for both transmit and receive

directions, thus the MCU must be the master. Eight bits are transmitted/received LSB first.

The baud rate is fixed at 1/12 of fOSC.

21.1.2

Mode 1

Mode 1 provides standard asynchronous, full-duplex communication using a total of 10 bits

per data byte. Data is transmitted through TxD and received through RxD with: a Start Bit

(logic '0'), eight data bits (LSB first), and a Stop Bit (logic '1'). Upon receive, the eight data

bits go into the SFR SBUF, and the Stop Bit goes into bit RB8 of the SFR SCON. The baud

rate is variable and derived from overflows of Timer 1 or Timer 2.

UPSD3312D Datasheet(PDF) 106 Page - STMicroelectronics

UPSD3312D Datasheet(HTML) 106 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL